iC-MP 8-BIT HALL ANGLE ENCODER
WITH RATIOMETRIC OUTPUT
Rev B1, Page 13/22
th > 0m s
tz ap( )
t > 50µ s
PSMI
V Z A P = V t( )z a p
th
VDD
tz a p ()
MA
D0
X
D1
X
D50
X
D51
S TA RT
SLI
X
X
X
X
X
NER R
Figure 13: Serial timing of Write ROM Mode
RO M
Z a p pi n g Dio d e s
R
A
M
Figure 13 shows the serial timing of a Write ROM op-
eration (burning the Zener zap diodes). The bit stream
is described in Table 4. Each Zener zap diode can be
programmed once with a logic of ’1’. The default value
of the Zener zap diodes is a logic ’0’ (with the excep-
tion of ZTEST(1:0)). The resulting parameter (OFF-
SET, MODE and ENERR) are generated by an xor op-
eration of the three sets of bits (see Figure 15).
O FF SET1
O FF SET2
O FF SET3
=1
=1
=1
OF F SE T
MO DE
1
0
0
n
F
M OD E 1
M OD E 2
M OD E 3
V DD
+ 5 V
+ 7 V
V ZAP
1
0
0
n
F
1
0
µ
F
+
P
r
o
g
r
a
m
m
i
n
g
Boa r d
M A
S LI
iC -M P
Serial
Interface
EN ER R 1
EN ER R 2
EN ER R 3
NE RR
P SMI
E NE R R
0 V
G
N
D
Figure 14: In-circuit programming
CR CI D
Z TE S T
T ES T
C RC ID
Z TES T
A 100 nF ceramic block capacitor must be placed on
the board directly between iC-MP’s VZAP and GND
pins. A 10 µF capacitor must also be present at the
end of the programming line as close to the connec-
tor as possible (see Figure 14). During programming,
up to 90 mA flow from pin VZAP to pin GND, making
it necessary to ensure proper PCB layout to minimize
voltage drops.
Figure 15: ROM construction
ICHAUS [ IC-HAUS GMBH ]
