iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev D1, Page 37/59
RSSI
Code
0
Addr. 0x3F; bit 4
Output Options
Ring operation
Normal output
If the clock count exceeds the data length, zero bits
are supplied.
ESSI
Addr. 0x3F; bit 5
Error bit output
Not included
Error bit enabled
Code
1
Ring operation
0
1
Notes
When enabling RSSI with the BiSS C protocol, pin
SLI reads in data to be output via SLO.
Table 53: Error bit
Table 55: Ring operation
GRAY_SCD
Addr. 0x3F; bit 7
Data format
The behavior of the output data depending on the
sense of rotation can be altered using pin DIR or via
register DIR. Both signals are EXOR-gated and switch
output data from increasing to decreasing values or
vice versa.
Code
0
1
Binary coded
Gray coded
Table 54: Data format (covers MT and ST data)
DIR
Code
0
Addr. 0x3D; bit 6
Code direction
Not inverted
Inverted
1
Table 56: Code direction up/down