iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev D1, Page 29/59
SINE-TO-DIGITAL CONVERSION MODES
iC-MN has two principle modes of operation. In no- Internal Bit Lengths
nius modes 2 or 3 tracks are combined by a nonius The used bit length is set for the master, segment
calculation with synchronization; in multiturn modes and nonius tracks using registers UBL_M, UBL_S and
the up to 3 tracks are combined to form an absolute UBL_N. From these used bits the internal singleturn
word via gear box code synchronization.
data word is then generated, for which purpose syn-
chronization bits are used. The bit lengths used
The used and synchronization bit lengths (parameters for synchronization can be set separately via register
UBL_x and SBL_x) are selectable for both operating SBL_S for the segment track and register SBL_N for
modes; in multiturn modes it is also possible to output the nonius track. Limitations governing the settable bit
unsynchronized data from all tracks.
lengths are summarized in Table 41.
With both principle operating modes iC-MN offers var-
ious sine-to-digital conversion modes. With a data re-
quest via the I/O interface this determines:
UBL_M
Code
Addr. 0x3B; bit 5:2
Bit length master
0x00
0
0x01..0x03 not permitted
0x04
...
4
• The sample time and thus the ”age” of the output
data
...
13
0x0D
• The necessary processing time prior to genera-
tion of the output data word.
Table 38: Bit length master
UBL_S
UBL_N
Addr. 0x3C; bit 1:0
Addr. 0x3B; bit 7:6
Addr. 0x3D; bit 0
Addr. 0x3C; bit 7:5
Code
0x00
...
Used bit length
0
...
13
0x0D
Table 39: Used bit length for segment and nonius
SBL_S
SBL_N
Code
0x00
...
Addr. 0x3C; bit 4:2
Addr. 0x3D; bit 3:1
Synchronization bit length
0
...
4
0x04
Table 40: Synchronization segment and nonius
P
Track
Count of bits processed Possible bit count
Master
UBL_M
0, 4..13
0, 4..13
0, 4..13
Segment
Nonius
UBL_S+SBL_S
UBL_N+SBL_N
Table 41: Possible bit counts for
UBL_M and UBL_x+SBL_x
ICHAUS [ IC-HAUS GMBH ]
