iC-MG
8-Bit Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
Rev C1, Page 10/20
SERIAL EEPROM INTERFACE
The serial configuration interface consists of the two exceed threshold voltage VTMon (see Electrical Char-
pins SCL and SDA and enables read access to a se- acteristics). Once the pin voltage has dropped to be-
rial EEPROM (requirements: 1 Kbit, 128x8, 3.3 V to low VTMon iC-MG starts communicating with the EEP-
5 V operation, device address 0x50 "1010 000"; rec- ROM. The device ID stored in register DEVID is used
ommended: Atmel AT24C01B; notes: devices ignoring to address the EEPROM.
A2...0 address bit settings are not suitable).
Example of CRC Calculation Routine
Once the supply has been switched on (power down
unsigned char ucDataStream
int iCRCPoly 0x11D ;
unsigned char ucCRC=0;
int 0;
= 0;
reset) iC-MG reads the configuration from the EEP-
ROM which has the device ID 0x50. Bit errors in the
0x00 to 0x2F memory area are monitored by the CRC
deposited in register CHKSUM (see program example;
the polynomial used is "1 0001 1101"). Should an error
occur while the data is being read in the readin pro-
cess is repeated; the system aborts following a fourth
faulty attempt and tristates the output drivers.
=
i
=
ucCRC = 1; / / s t a r t value ! ! !
for ( iReg
= 0; iReg <47; iReg ++)
{
ucDataStream
for ( i =0; i <=7; i ++)
i f ( (ucCRC & 0x80 ) != ( ucDataStream & 0x80 ) )
ucCRC = (ucCRC << 1) iCRCPoly ;
else
ucCRC = (ucCRC << 1 ) ;
ucDataStream ucDataStream << 1;
= ucGetValue ( iReg ) ;
{
^
=
As an alternative to the power down reset iC-MG can
be triggered to again read in the configuration via pin
NERR. To this end pin voltage V(NERR) must initially
}
}
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