iC-MB3
BiSS INTERFACE MASTER,
1-Chan./3-Slaves
Rev D1, Page 9/26
OPERATING REQUIREMENTS: µC Interface, SPI mode
Operating conditions: CFGSPI = 1
VDD = 3 ... 5.5V, Ta = -25 ... 85 °C; input levels lo = 0 ... 0.45 V, hi = 2.4 V ... VDD
Item
l40
l41
l42
l43
l44
l45
l46
l47
l48
Symbol
t
sCCL
t
sDCL
t
hDCL
t
CLh
t
CLl
t
hCLC
t
CSh
t
pCLD
t
pCSD
Parameter
Setup Time:
NCS hi6lo until SCLK/ALE lo6hi
Setup Time:
SI/DB0 stable before SCLK/ALE lo6hi
Hold Time:
SI/DB0 stable after SCLK/ALE lo6hi
Signal Duration SCLK/ALE hi
Signal Duration SCLK/ALE lo
Hold Time:
NCS lo after SCLK/ALE lo6hi
Signal Duration NCS hi
Propagation Delay:
SO/DB1 stable after SCLK/ALE hi6lo
Propagation Delay: SO/DB1 high
impedance after NCS lo6hi
Conditions
Fig.
Min.
0.29
0.29
0.29
7a/b
7a/b
7a/b
7a/b
7b
7b
10
15
0
10
10
0
0
0
0
25
25
Max.
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Figure 7: µC interface in SPI mode with write cycle (top) and read cycles (bottom).
ICHAUS [ IC-HAUS GMBH ]
