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IC-LVCHIP 参数 Datasheet PDF下载

IC-LVCHIP图片预览
型号: IC-LVCHIP
PDF下载: 下载PDF文件 查看货源
内容描述: 5位光电编码器 [5-BIT OPTO ENCODER]
分类和应用: 光电编码器
文件页数/大小: 12 页 / 191 K
品牌: ICHAUS [ IC-HAUS GMBH ]
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iC-LV  
5ꢀBITꢁOPTOꢁENCODER  
RevꢁA3,ꢁPageꢁ9/12  
Modes of operation  
iCꢀLVꢁhasꢁvariousꢁmodesꢁofꢁoperationꢁwhichꢁareꢁpreꢀ  
selectedꢁusingꢁpinꢁMODE.ꢁMODEꢁ=ꢁ0ꢁselectsꢁoperaꢀ  
tionꢁasꢁanꢁoptoelectronicꢁencoderꢁICꢁwithꢁaꢁparallel  
output;ꢁMODEꢁ=ꢁ1ꢁ(default)ꢁmakesꢁaꢁnumberꢁofꢁserial  
operatingꢁmodesꢁavailable.  
Inꢁboth No SyncꢁandꢁNo Sync BinaryꢁmodeꢁiCꢀLV  
operatesꢁwithoutꢁsynchronization,ꢁi.e.ꢁitꢁstoresꢁtheꢁ5  
trackvaluesonthefirstfallingedgeseenatSCLK  
afterꢁaꢁlongꢁidleꢁtimeꢁandꢁthenꢁtransmitsꢁtheꢁtrackꢁdata  
viaꢁpinꢁSOUTꢁonꢁeachꢁofꢁtheꢁ5ꢁfollowingꢁrisingꢁedges  
atꢁSCLK.ꢁAtꢁtheꢁsameꢁtimeꢁpinꢁSERINꢁreadsꢁinꢁdata  
fromꢁ aꢁ preꢀpositionedꢁ iCꢀLVꢁ whichꢁ canꢁ thenꢁ be  
passedꢁon.ꢁHere,ꢁiCꢀLVꢁoperatesꢁasꢁaꢁ5ꢀbitꢁshiftꢁregisꢀ  
ter(orꢁ6ꢀbitꢁifꢁtheꢁerrorꢁbitꢁisꢁactiveꢁduringꢁNoꢁSync  
mode)ꢁwhoseꢁflipflopsꢁacceptꢁinputꢁdataꢁonꢁaꢁfalling  
edgeꢁandꢁoutputꢁstoredꢁdataꢁonꢁaꢁrisingꢁedge.  
Parallel Output Mode (MODE = 0)  
Inꢁparallelꢁoutputꢁmodeꢁtheꢁ5ꢁtracksꢁwithꢁsensorꢁD4  
(MSB)ꢁtoꢁsensorꢁD0ꢁ(LSBꢁorꢁleastꢁsignificantꢁbit)ꢁare  
outputꢁ inꢁ parallelꢁ toꢁ pinsꢁ SYNM1ꢁ (LSB),ꢁ SYNM0,  
SCLK,ꢁSERINꢁandꢁSOUTꢁ(MSB).  
InꢁNo Sync BinaryꢁmodeꢁdataꢁisꢁconvertedꢁfromꢁGray  
toꢁbinaryꢁbeforeꢁbeingꢁoutput.ꢁInꢁthisꢁmodeꢁofꢁoperaꢀ  
tionꢁitꢁisꢁnotꢁpossibleꢁtoꢁoutputꢁaꢁserialꢁerrorꢁbit;ꢁno  
dataꢁfromꢁSERINꢁisꢁacceptedꢁonꢁtheꢁfirstꢁandꢁsecond  
risingꢁedgeꢁatꢁSCLK.  
TheꢁwiringꢁofꢁpinꢁNDIRꢁdeterminesꢁtheꢁcountꢁdirecꢀ  
tion.ꢁWithꢁNDIRꢁconnectedꢁtoꢁGNDꢁtheꢁMSBꢁisꢁoutput  
invertedꢁ soꢁ thatꢁ theꢁ countꢁ directionꢁ canꢁ beꢁ altered  
whenꢁreadingꢁGrayꢀcodedꢁdiscs.  
IfꢁpinꢁNDIRꢁisꢁconnectedꢁtoꢁGNDꢁaꢁchangeꢁinꢁcount  
directionꢁwithꢁGrayꢁcodesꢁcanꢁbeꢁinitiatedꢁbyꢁinverting  
theꢁMSB.ꢁByꢁconnectingꢁpinꢁNINVꢁtoꢁGNDꢁallꢁtrack  
dataꢁ canꢁ beꢁ outputꢁ inverted.ꢁ Bothꢁ pinsꢁ NINVꢁ and  
NDIRꢁareꢁhighꢁwhenꢁnotꢁconnected.  
ByꢁconnectingꢁpinꢁNINVꢁtoꢁGNDꢁtheꢁoutputꢁofꢁallꢁbits  
canꢁbeꢁinverted.ꢁIfꢁthisꢁisꢁnotꢁrequired,ꢁNINVꢁcanꢁbe  
leftꢁ open.ꢁ NDIRꢁ andꢁ NINVꢁ canꢁ beꢁ usedꢁ eitherꢁ toꢀ  
getherꢁorꢁindependentlyꢁofꢁoneꢁanother.ꢁIfꢁbothꢁpins  
areꢁconnectedꢁtoꢁGNDꢁallꢁbitsꢁBꢁwithꢁtheꢁexceptionꢁof  
theꢁMSBꢁBꢁareꢁoutputꢁinverted.  
InꢁmodesꢁSSI out andꢁSync outꢁiCꢀLVꢁoperatesꢁwith  
synchronization,ꢁ classingꢁ theꢁ LSBꢁ ofꢁ itsꢁ ownꢁ code  
discꢁasꢁaꢁsynchronizationꢁbit.ꢁTheꢁdataꢁreadꢁinꢁfrom  
thecodediscisconvertedintobinarycodeand,if  
necessary,correctedꢁbyꢁ+1ꢁorꢁꢀ1ꢁdependingꢁonꢁthe  
MSBꢁofꢁtheꢁpreꢀpositionedꢁdeviceꢁalsoꢁreadꢁin.  
ByꢁconnectingꢁpinꢁSEENꢁtoꢁGNDꢁtheꢁbitsꢁcanꢁbeꢁoutꢀ  
putꢁinꢁbinaryꢁformatꢁfollowingꢁaꢁGrayꢁtoꢁbinaryꢁcode  
conversion.ꢁThisꢁisꢁdoneꢁafterꢁtheꢁbitsꢁhaveꢁbeenꢁinꢀ  
verted,ꢁ whereꢁ relevant.ꢁ Ifꢁ pinꢁ SEENꢁ isꢁ leftꢁ unconꢀ  
nectedꢁtheꢁoutputꢁisꢁinꢁGrayꢁcode.  
EachꢁLSBꢁhasꢁtheꢁsameꢁresolutionꢁasꢁtheꢁMSBꢁofꢁthe  
preꢀpositionedꢁ iCꢀLV,ꢁ operatedꢁ atꢁ aꢁ 16ꢀfoldꢁ faster  
speed,ꢁandꢁisꢁassembledꢁsoꢁthatꢁitꢁeitherꢁtrailsꢁ(SEEN  
isꢁhigh,ꢁdefault)ꢁorꢁleadsꢁ(SEENꢁisꢁlow)ꢁbyꢁupꢁtoꢁ90°.  
Theꢁphaseꢁpositionꢁmustꢁbeꢁconfiguredꢁforꢁeachꢁindiꢀ  
vidualꢁ codeꢁ discꢁ usingꢁ pinꢁ SEENꢁ (trail/lead).ꢁ This  
phaseꢁshiftꢁappliesꢁtoꢁdataꢁconvertedꢁintoꢁbinaryꢁcode  
andꢁisꢁnotꢁimmediatelyꢁvisibleꢁonꢁtheꢁcodeꢁdiscs.  
Serial Output Mode (MODE = 1, default)  
Inꢁ serialꢁ outputꢁ modeꢁ pinꢁ SCLKꢁ isꢁ theꢁ clockꢁ input  
hookeduptoanSSImastersupplyinganintermitꢀ  
tentlyꢁactiveꢁclockꢁsignalꢁwithꢁaꢁhighꢁlevelꢁduringꢁidle  
time,ꢁpinꢁSERINꢁisꢁtheꢁserialꢁdataꢁinputꢁandꢁpinꢁSOUT  
theꢁserialꢁdataꢁoutput.  
Ifꢁ dataꢁ isꢁ readꢁ outꢁ seriallyꢁ andꢁ synchronizedꢁ elseꢀ  
whereꢁaꢁsmallerꢁphaseꢁshiftꢁmustꢁbeꢁadjusted.ꢁInꢁthis  
instanceꢁdataꢁtransmissionꢁtimesꢁmustꢁbeꢁtakenꢁinto  
account.  
Variousꢁserialꢁoperationalꢁmodesꢁandꢁoutputꢁformats  
canꢁ beꢁ configuredꢁ usingꢁ pinsꢁ SYNM0ꢁ andꢁ SYNM1  
(highꢁwhenꢁnotꢁwired).  
Thesynchronizationprocessensuresthatsynchroꢀ  
nousꢁwithꢁtheꢁflippingꢁofꢁtheꢁMSBꢁfromꢁtheꢁpreꢀposiꢀ  
tionedꢁ iCꢀLVꢁ trackꢁ dataꢁ isꢁ switchedꢁ forwardꢁ toꢁ the  
nextꢁdataꢁwordꢁexpectedꢁonꢁthatꢁcodeꢁdisc.ꢁOnceꢁthe  
trackꢁdataꢁhasꢁbeenꢁcapturedꢁonꢁtheꢁfirstꢁfallingꢁedge  
atꢁSLCK,ꢁtheꢁdataꢁwordꢁisꢁsynchronizedꢁwithꢁtheꢁMSB  
ofꢁtheꢁpredecessorꢁduringꢁtheꢁfirstꢁlowꢁandꢁfirstꢁhigh  
periodꢁonꢁtheꢁSCLKꢁlineꢁ(theꢁMSBꢁisꢁpossiblyꢁsubject  
toꢁchangeꢁwithinꢁthisꢁtime).  
SYNM Serial Operational  
(1:0) Modes  
Data Output Format  
1ꢁ1  
1ꢁ0  
0ꢁ1  
0ꢁ0  
NoꢁSyncꢁꢁꢁ(default)  
NoꢁSyncꢁBinary  
SyncꢁOut  
5ꢁbitꢁGrayꢁ(option:ꢁ+1ꢁerrorꢁbit)  
5ꢁbitꢁbinary  
4ꢁbitꢁbinaryꢁ(correctedꢁbyꢁ±1ꢁ)  
4ꢁbitꢁbinaryꢁ(correctedꢁbyꢁ±1ꢁ)  
SSIꢁOut  
InꢁNo SyncꢁmodeꢁanꢁLEDꢁcontrolꢁerrorꢁbitꢁ(lowꢁactive)  
canꢁbeꢁaddedꢁtoꢁtheꢁserialꢁdataꢁbyꢁreleasingꢁitꢁviaꢁpin  
SEEN.ꢁInꢁNo Sync BinaryꢁmodeꢁpinꢁSEENꢁhasꢁno  
function.  
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