IBMN612404GT3B
IBMN612804GT3B
128Mb Double Data Rate Synchronous DRAM
Preliminary
Operating Mode
The normal operating mode is selected by issuing a Mode Register Set Command with bits A7-A11 to zero,
and bits A0-A6 set to the desired values. A DLL reset is initiated by issuing a Mode Register Set command
with bits A7 and A9-A11 each set to zero, bit A8 set to one, and bits A0-A6 set to the desired values. A Mode
Register Set command issued to reset the DLL should always be followed by a Mode Register Set command
to select normal operating mode.
All other combinations of values for A7-A11 are reserved for future use and/or test modes. Test modes and
reserved states should not be used as unknown operation or incompatibility with future versions may result.
CAS Latencies
CAS Latency = 2, BL = 4
CK
CK
Read
NOP
NOP
NOP
NOP
NOP
Command
CL=2
DQS
DQ
CAS Latency = 2.5, BL = 4
CK
CK
Read
NOP
NOP
NOP
NOP
NOP
Command
CL=2.5
DQS
DQ
Shown with nominal t , t
, and t
.
DQSQ
Don’t Care
AC DQSCK
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
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