IBMN612404GT3B
IBMN612804GT3B
128Mb Double Data Rate Synchronous DRAM
Preliminary
Extended Mode Register Definition
A
A
A
A
A
A
A
A
A
0
BA1 BA0
A
A
A
9
Address Bus
8
7
6
5
4
3
2
1
11
10
Extended
Mode Register
0*
1*
Operating Mode
QFC DS
DLL
Drive Strength
Drive Strength
Normal
A11 - A3
0
A2 - A0
Valid
Operating Mode
A
1
Normal Operation
0
All other states
Reserved
−
−
1
Reserved
A
QFC
2
0
1
Disable
Enable
(Optional)
A
DLL
0
0
Enable
Disable
1
* BA0 and BA1 must be 1, 0 to select the Extended Mode Register
(vs. the base Mode Register)
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
06K0566.F39350B
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