IBMN612404GT3B
IBMN612804GT3B
128Mb Double Data Rate Synchronous DRAM
Preliminary
Non-Consecutive Read Bursts: CAS Latencies (Burst Length = 4)
CAS Latency = 2
CK
CK
Read
NOP
NOP
Read
NOP
NOP
Command
Address
BAa, COL n
BAa, COL b
CL=2
DQS
DQ
DO a-n
DOa- b
CAS Latency = 2.5
CK
CK
Read
NOP
NOP
Read
NOP
NOP
NOP
Command
Address
BAa, COL n
BAa, COL b
CL=2.5
DQS
DQ
DO a-n
DOa- b
DO a-n (or a-b) = data out from bank a, column n (or bank a, column b).
3 subsequent elements of data out appear in the programmed order following DO a-n (and following DO a-b).
Shown with nominal t , t , and t
.
DQSQ
AC DQSCK
Don’t Care
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Use is further subject to the provisions at the end of this document.
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