IBM39STB032xx
IBM39STB034xx
Preliminary STB032xx and STB034xx Digital Set-Top Box Integrated Controllers
Features
Overall
• High-End Set-Top Box technology
• Four major subsystems integrated with IBM
®
on-chip CoreConnect™ structure.
• Maximum MIPS for OS and application tasks
• Simplified driver and software development
• Scalable, flexible, and extendible
• 108 MHz/150 MIPS and 162 MHz/225 MIPS
versions available
• 3.3 V and 2.5 V power supplies
• IBM CMOS SA-12E (0.25
µm)
process
technology
• 304-pin PBGA package
MPEG-2 Digital Audio/Video Subsystem
• MPEG-2 Video Decoder
• MPEG-2 Audio Decoder
• MPEG-2 Transport/DVB Descrambler
• Dolby
®
Digital Audio
1
support on selected parts
• Macrovision Copy Protection on selected parts
• Display Controller
• Digital Encoder (DENC) with six outputs
• Anti-Flicker Filter
PowerPC 405™ Host Processor: PPC405B3 CPU
• 16KB Instruction, 8KB Data caches
• Universal Interrupt Controller
Memory Subsystem
• DMA Controller
• Cross-Bar Switch
• External Bus Interface Unit (EBIU)
• IDE interface
• Two SDRAM Controllers
Peripheral Subsystem
• General Purpose Timers (GPTs)
• Pulse Width Modulators
• 1284 Parallel Port
• Two Smart Card controllers
• Two I
2
C Interfaces
• 16550 Serial Communications Port
• Infrared Serial Communications Port
• General Purpose Input/Output (GPIO)
• Serial Controller Port
• Modem Serial Interface/Digital Audio Input
Description
IBM STB03xxx Digital Set-Top Box Integrated Con-
troller family are highly integrated silicon devices
specifically developed for digital set-top box (STB)
applications using industry-leading IBM CMOS SA-
12E (0.25
µm)
process technology.
The STB03xxx is part of the second generation of
IBM products for digital STB applications. PowerPC
processing and peripheral I/O architecture provide a
high level of performance and functionality when
used in audio and video subsystems. The resulting
STB technology is full-functioned and easy to use.
The STB03xxx minimizes host processor interven-
tion to maximize MIPS for operating system and
application tasks. Most of the features required in
the back end of typical midrange and high-end
STBs are integrated. Driver and software develop-
ment is facilitated while preserving scaleability, flexi-
bility, and extendibility.
Architecturally, the devices consist of four sub-
systems interconnected and tuned using CoreCon-
nect, the IBM multiple-bus, on-chip interconnect
structure:
1. PowerPC host processor
2. Digital audio/video
3. Memory interface
4. Peripheral
These high performance subsystems are suited to
advanced interactive STBs with demanding soft-
ware requirements including web browsers and
Java™.
1. This implementation has not yet completed the evaluation
process by Dolby Laboratories and is offered subject to
obtaining approval. A Dolby Digital Audio license is required
from Dolby Laboratories.
STB03_sds_041800.fm.01
April 18, 2000
Features
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