Datasheet
PowerPC 970FX RISC Microprocessor
Table 3-7. Power Consumption Throttle Back F/2
Frequency
1.6 GHz
1.8 GHz
2.0 GHz
Condition
Maximum at 65°C
Maximum at 65°C
Maximum at 65°C
Voltage (V)
1.00
Power (W)
Doze Power
Nap Power
Notes
1, 2, 3
1, 2, 3
1, 2, 3
15
22
29
8
7
1.10
13
16
11
13
1.10
Note: Maximum power at 85°C is the only value that is guaranteed by manufacturing test. Values for typical at 65°C, nap, and doze are
not guaranteed by test. These values are to be used as characterization-based nominal values and are included for comparison pur-
poses only.
1. Maximum power is projected at the nominal V worst case I
, and the maximum temperature as specified.
DDq
DD
2. Voltage tolerance is 50 mV.
3. These are core power only; OV power of 1 - 3 watts is not included.
DD
3.2 ac Electrical Characteristics
This section provides the ac electrical characteristics for the PowerPC 970FX. After fabrication, parts are
sorted by maximum processor core frequency as shown in Section 3.3 on page 26 and tested for conform-
ance to the ac specifications for that frequency. The processor core frequency is determined by the SYSCLK
and the settings of the PLL_MULT signal.
This section describes only asynchronous and mode-select inputs and outputs. For bus timing information,
see the PowerPC 970FX RISC Microprocessor Users Manual.
3.3 Clock ac Specifications
Table 3-8 provides the clock ac timing specifications as defined in Figure 3-1 Clock Differential HSTL Signal
on page 27.
Table 3-8. Clock ac Timing Specifications (Page 1 of 2)
Value
Callout
Number
Characteristic
Unit
Notes
Minimum
Maximum
300
—
SYSCLK frequency
100
—
MHz
ps
1, 2, 4
—
SYSCLK input jitter (cycle to cycle)
SYSCLK rise and fall time
75
4
3, 4
4
1
2
—
500
ps
SYSCLK and SYSCLK input high voltage
—
OV + 0.3
V
DD
Notes:
1. Important: Processor frequency is determined by the PLL_MULT and SYSCLK input frequencies. PLL_RANGE(1:0) must be set
to the correct values for the expected processor frequency. Consult Table 5-2. PowerPC 970FX RISC Microprocessor PLL Config-
uration on page 64 for the allowable frequency range for these pins.
2. PowerPC 970FX minimum processor frequency will be determined by characterization. The minimum frequency is an estimation.
3. The rise and fall times for the SYSCLK inputs are measured from 0.4 to 1.0 V.
4. Important: The data in this table is based on simulation and might be revised after hardware characterization.
5. For a timing diagram, see Figure 3-1 on page 27.
6. Guaranteed by design and not tested.
7. The differential voltage is the minimum peak-to-peak voltage on both the SYSCLK and SYSCLK pins (similar to what is measured
with single-ended oscilloscope probes).
Electrical and Thermal Characteristics
Page 26 of 78
Version 2.5
March 26, 2007
IBM [ IBM ]
