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IBM25PPC750L-DB0A433W 参数 Datasheet PDF下载

IBM25PPC750L-DB0A433W图片预览
型号: IBM25PPC750L-DB0A433W
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 433MHz, CMOS, CBGA360, 25 X 25 MM, 1.27 MM PITCH, CERAMIC, BGA-360]
分类和应用: 时钟外围集成电路
文件页数/大小: 46 页 / 610 K
品牌: IBM [ IBM ]
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PowerPC 750 SCM RISC Microprocessor  
PID8p-750  
Preliminary Copy  
L2CLKOUTB network could also be used depending on the loading, frequency, and number of SRAMs.  
Output Buffer DC Impedance  
The PID8p-750 60x and L2 I/O drivers were characterized over process, voltage, and temperature. To mea-  
sure Z , an external resistor is connected to the chip pad, either to OVDD or GND. Then the value of such  
0
resistor is varied until the pad voltage is OVDD/2; see Figure 17, “Driver Impedance Measurement,” below.  
The output impedance is actually the average of two components, the resistances of the pull-up and pull-  
down devices. When Data is held low, SW1 is closed (SW2 is open), and RN is trimmed until Pad = OVDD/2. RN  
then becomes the resistance of the pull-down devices. When Data is held high, SW2 is closed (SW1 is open),  
and RP is trimmed until Pad = OVDD/2. RP then becomes the resistance of the pull-up devices. With a properly  
designed driver RP and RN are close to each other in value, then Z0 = (RP + RN)/2.  
Figure 17. Driver Impedance Measurement  
OVDD  
RN  
SW2  
Pad  
Data  
SW1  
RP  
GND  
The following table summarizes the impedance a board designer would design to for a typical process. These  
values were derived by simulation at 65°C. As the process improves, the output impedance will be lower by  
several ohms than this typical value.  
Impedance Characteristics  
VDD = 1.9VDC, L2OVDD=OVDD = 3.3VDC, T = 65°C  
J
Process  
Typical  
60x  
43  
L2  
38  
Symbol  
Z0  
Unit  
Page 32  
Version 2.0  
Datasheet  
9/30/99  
 
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