Datasheet
IBM PowerPC 750GX RISC Microprocessor
DD1.X
Table 4-3. Signal Listing for the CBGA Package (Continued)
Signal Name
WT
Pin Count
1
Active
Low
Input/Output
Output
Notes
Notes:
1. QACK in a logical high state at the transition of HRESET from asserted to negated enables standard pre-charge mode in the
750GX.
QACK in a logical low state at the transition of HRESET from asserted to negated enables extended pre-charge mode in the
750GX.
2. QACK, in a logical low state at the transition of QREQ from asserted to negated, enables the 750GX processor to enter the soft
stop (Nap) state for proper JTAG emulator operation.
Dimensions and Signal Assignments
Page 42 of 73
750GX_ds_body.fm SA14-2765-02
September 2, 2005
IBM [ IBM ]
