Table 5-6. Input/Output Use (Sheet 4 of 4)
750FL Micropro-
Input/
Input/Output with
Internal
Pullup Resistors
Required
External
Resistor
cessor Signal
Name
Active Level
High
Usage Group
Level Protect
Keeper
Comments
Notes
1, 3, 4
Output
TT[0:4]
Input/Output
Transfer Attributes
Power Supply
VDD
WT
Low
Output
Transfer Attributes
Keeper
1, 3, 4
Notes:
1. Depends on the system design. The electrical characteristics of the 750FL microprocessor do not add additional constraints to the system design. Therefore, whatever is
done with the net depends on the system requirements.
2. HRESET, SRESET, and TRST are signals used for ESP and RISCWatch to enable the correct operation of the debuggers. Logical AND gates must be placed between
these signals and 750FL microprocessor. (See Figure 5-7 IBM RISCWatch JTAG to HRESET, TRST, and SRESET Signal Connector on page 55.)
3. The 750FL microprocessor provides protection from metastability on inputs through the use of a “keeper” circuit on specific inputs. See Section 5.5 Level Protection on
page 55 for a more detailed description.
4. If a system design requires a signal level to be maintained while not being actively driven, an external resistor or device must be used (keepers assure no metastability of
inputs but do not guarantee a level).
5. The 750FL microprocessor does not require external pullups on address and data lines. Control lines must be treated individually.