DD 2.X
PowerPC 750FX RISC Microprocessor
Preliminary
5.8.2 Internal Package Conduction
For the exposed-die packaging technology, shown in Table 3-3 Package Thermal Characteristics1 on
page 10, the intrinsic conduction thermal resistance paths are as follows.
• Die junction-to-case thermal resistance (Primary thermal path)
• Die junction-to-lead thermal resistance (Not normally a significant thermal path)
• Die junction-to-ambient thermal resistance (Largely dependent on customer-supplied heatsink)
Figure 5-9 depicts the primary heat transfer path for a package with an attached heat sink mounted to a
printed-circuit board.
Figure 5-9. C4 Package with Heat Sink Mounted to a Printed-Circuit Board
External Resistance
Radiation
Convection
Heat Sink
Thermal Interface Material
Die/Package
Chip Junction
Internal
Resistance
Package/Leads
Printed-Circuit Board
Radiation
Convection
External Resistance
(Note the internal versus external package resistance.)
Heat generated on the active side (ball) of the chip is conducted through the silicon, then through the heat
sink attach material (or thermal interface material), and finally to the heat sink; where it is removed by forced-
air convection. Since the silicon thermal resistance is quite small, for a first-order analysis, the temperature
drop in the silicon may be neglected. Thus, the heat sink attach material and the heat sink conduc-
tion/convective thermal resistances are the dominant terms.
The heat flow path from the die, through the chip-to-substrate balls, through the substrate, through the
substrate-to-board balls, and through the board to ambient is usually too high of a resistance to offer much
cooling. In addition, various factors make the heat flow through this path very difficult to accurately determine.
Designers must not depend on cooling the 750FX using this means unless thermal modeling has been confi-
dently completed.
5. System Design Information
Page 52 of 63
Body_750FX_DS_DD2.X.fm.2.0
June 9, 2003
IBM [ IBM ]
