Preliminary
PowerPC 405GPr Embedded Processor Data Sheet
Clocking Specifications
Symbol
Parameter
Min
Max
Units
CPU
PF
PT
Processor clock frequency
266.66 or 333.33
MHz
ns
C
C
Processor clock period
3.75 or 3.00
SysClk Input
SCF
Clock input frequency
25
15
66.66
40
MHz
ns
C
SCT
Clock period
C
SCT
Clock edge stability (phase jitter, cycle to cycle)
Clock input high time
± 0.15
ns
CS
SCT
40% of nominal period 60% of nominal period
40% of nominal period 60% of nominal period
ns
CH
SCT
Clock input low time
ns
CL
Note: Input slew rate > 1V/ns between 0.8V and 2.0V
MemClkOut Output
MCOF
MCOT
MCOT
Clock output frequency @ PF = 266MHz
133.33
MHz
ns
C
C
Clock period @ PF = 266MHz
7.5
C
C
Clock edge stability (phase jitter, cycle to cycle)
Clock output high time
± 0.2
ns
CS
CH
MCOT
MCOT
45% of nominal period 55% of nominal period
45% of nominal period 55% of nominal period
ns
Clock output low time
ns
CL
TrcClk Output
TCF
PF / 2
Clock output frequency
Clock period
MHz
ns
C
C
TCT
PT x 2
C
C
TCT
Clock edge stability (phase jitter, cycle to cycle)
Clock output high time
± 0.2
ns
CS
TCT
45% of nominal period 55% of nominal period
45% of nominal period 55% of nominal period
ns
CH
TCT
Clock output low time
ns
CL
Other Clocks
VCOF
VCO frequency @ PF = 266MHz
500
500
1000
1333
MHz
MHz
MHz
MHz
C
C
VCOF
VCO frequency @ PF = 333MHz
C
C
PLBF
PLB frequency
OPB frequency
133.33
66.66
C
OPBF
C
Clocking Waveform
2.0V
1.5V
0.8V
T
T
CL
CH
T
C
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