PowerPC 405GP Embedded Processor Data Sheet
Signal List
The following table provides a summary of the number of package pins associated with each functional
interface group.
Pin Summary
No. of Pins
Group
413-Ball package
456-Ball Package
25 mm
60
35 mm
60
27mm
60
18
71
96
9
PCI
Ethernet
18
18
SDRAM
71
71
External peripheral
External master
Internal peripheral
Interrupts
96
96
9
9
15
15
15
7
7
7
JTAG
5
5
5
System
19
19
19
300
24
Total Signal Pins
300
38
300
32
OV
DD
V
22
26
24
60
36
4
24
56
DD
Gnd
Thermal (and Gnd)
Reserved
15
36
12
16
Total Pins
413
456
456
Multiplexed Pins
In the table “Signal Functional Description” on page 34, each external signal is listed along with a description
of the signal function. Some signals are multiplexed on the same pin (ball) so that the pin can be used for
different functions. Multiplexed signals are shown as a default signal with a secondary signal in square
brackets (for example, GPIO1[TS1E]). Active-low signals (for example, RAS) are marked with an overline.
It is expected that in any single application a particular pin will always be programmed to serve the same
function. The flexibility of multiplexing allows a single chip to offer a richer pin selection than would otherwise
be possible.
In addition to multiplexing, many pins are also multi-purpose. For example, the EBC peripheral controller
address pins are used as outputs by the PPC405GP to broadcast an address to external slave devices when
the PPC405GP has control of the external bus. When, during the course of normal chip operation, an external
master gains ownership of the external bus, these same pins are used as inputs which are driven by the
external master and received by the EBC in the PPC405GP. In this example, the pins are also bidirectional,
serving as both inputs and outputs.
Intialization Strapping
One group of pins is used as strapped inputs during system reset. These pins function as strapped inputs
only during reset and are used for other functions during normal operation (see “Strapping” on page 56). Note
Page 32 of 60
6/20/03
IBM [ IBM ]
