Preliminary
PowerNP NPe405L Embedded Processor Data Sheet
Recommended DC Operating Conditions
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended
conditions can affect device reliability.
Parameter
Logic Supply Voltage
I/O Supply Voltage
Symbol
Minimum
+2.3
Typical
+2.5
Maximum
+2.7
Unit
V
Notes
V
DD
OV
+3.0
+3.3
+3.6
V
DD
AV
PLL Supply Voltage
+2.3
+2.5
+2.7
V
DD
Input Logic High (3.3V LVTTL
receivers)
V
OV
+2.0
+1.7
+2.0
V
V
V
IH
DD
Input Logic High (2.5V CMOS
receivers)
V
V
IH
DD
Input Logic High (5.0V LVTTL
receivers)
V
+5.5
+0.8
IH
V
Input Logic Low
Output Logic High
Output Logic Low
0
+2.4
0
V
V
V
IL
V
OV
OH
DD
V
+0.4
±10
OL
3.3V I/O input current (no pull-up or
pull-down)
I
µA
IL1
Input Current (with internal pull-
down)
I
±10 (@ 0V)
-250 (@ 0V)
400 (@ 3.6V)
±10 (@ 3.6V)
µA
µA
V
IL2
I
Input Current (with internal pull-up)
IL3
Input Max Allowable Overshoot
(2.5V CMOS receivers)
V
V
+ 0.6
DD
IMAO25
Input Max Allowable Overshoot
(3.3V LVTTL receivers)
V
OV + 0.6
V
V
V
V
IMAO3
DD
Input Max Allowable Overshoot
(5.0V LVTTL receivers)
V
+5.5
IMAO5
Input Max Allowable Undershoot
(3.3V or 5.0V receivers)
V
− 0.6
IMAU
Output Max Allowable Overshoot
(3.3V or 5.0V receivers)
V
OV + 0.3
OMAO
DD
Output Max Allowable Undershoot
(3.3V and 5.0V receivers)
V
V
− 0.6
− 40
OMAU3
T
Case Temperature
+85
°C
C
Notes:
1. See “5V-Tolerant I/O Input Current” on page 40
39