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IBM25EMPPC750LCBE4000 参数 Datasheet PDF下载

IBM25EMPPC750LCBE4000图片预览
型号: IBM25EMPPC750LCBE4000
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 400MHz, CMOS, CBGA360, 25 X 25 MM, 1.27 MM PITCH, CERAMIC, BGA-360]
分类和应用: 时钟外围集成电路
文件页数/大小: 50 页 / 600 K
品牌: IBM [ IBM ]
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PowerPC 740 and PowerPC 750 Embedded Microprocessor  
IBM CMOS 0.20 um Copper Technology EMPPC740L and EMPPC750L  
Pull-up Resistor Requirements  
The 750 requires high-resistive (weak: 10K) pull-up resistors on several control signals of the bus interface  
to maintain the control signals in the negated state after they have been actively negated and released by the  
750 or other bus masters. These signals are: TS, ABB, DBB, TT[0:4], TBST, GBL, and ARTRY.  
In addition, the 750 has one open-drain style output that requires a pull-up resistor (weak or stronger: 4.7KΩ  
- 1- K) if it is used by the system. This signal is: CKSTP_OUT.  
The data bus input receivers are normally turned off when no read operation is in progress and do not require  
pull-up resistors on the data bus. Other data bus receivers in the system, however, may require pull-ups, or  
that those signals be otherwise driven by the system during inactive periods. The data bus signals are: DH[0-  
31], DL[0-31], and DP[0-7].  
If address or data parity is not used by the system, and the respective parity checking is disabled through  
HID0, the input receivers for those pins are disabled, and those pins do not require pull-up resistors and  
should be left unconnected by the system. If all parity generation is disabled through HID0, then all parity  
checking should also be disabled through HID0, and all parity pins may be left unconnected by the system.  
No pull-up resistors are normally required for the L2 interface.  
Page 38  
Version 1.51  
PowerPC 740 and PowerPC 750 Datasheet  
5/20/99  
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