Datasheet
CPC945 Bridge and Memory Controller
CPC925 North bridge
Preliminary
List of Tables
Table 1-1.
Table 1-2.
Table 1-3.
Table 2-1.
Table 2-2.
Table 3-1.
Table 3-2.
Table 3-3.
Table 3-4.
Table 3-5.
Table 3-6.
Table 3-7.
Table 3-8.
Table 3-9.
CPC945 Revision Register .................................................................................................... 14
CPC945 Standard OEM Sort Speed Bins for DD 1.2 ............................................................ 15
CPC945 Standard OEM Sort Speed Bins for DD 2.0 ............................................................ 15
General Parameters of the CPC945 ...................................................................................... 19
Allowable Forces on the CPC945 Package ........................................................................... 20
Absolute Maximum Ratings ................................................................................................... 21
Package Thermal Information ................................................................................................ 22
Input Capacitance .................................................................................................................. 22
Recommended Functional dc Operating Ratings .................................................................. 23
Reference Clock Input Frequencies ....................................................................................... 26
PI_REFCLK Reference Clock Specifications ......................................................................... 26
DDR_REFCLK Reference Clock Specifications .................................................................... 27
HT_REFCLK and PCIE_REFCLK Reference Clock Input Specifications for LVDS .............. 27
HT_REFCLK and PCIE_REFCLK Reference Clock Input Specifications for CMOS ............. 28
2
Table 3-10. I C-Bus Specifications ........................................................................................................... 29
Table 4-1.
Table 4-2.
Table 4-3.
Table 4-4.
Table 4-5.
Table 4-6.
Table 4-7.
Table 4-8.
Table 4-9.
CPC945 Signal Pin Overview ................................................................................................ 35
PCIe Signal Pins .................................................................................................................... 36
DDR SDRAM Signal Pins ...................................................................................................... 36
HyperTransport Signal Pins ................................................................................................... 38
Processor Interface 0 Signal Pins .......................................................................................... 39
Processor Interface 1 Signal Pins .......................................................................................... 40
Processor Interface Support Signal Pins ............................................................................... 40
Processor Interface Power Management Signal Pins ............................................................ 41
System Support Signal Pins ................................................................................................... 41
2
Table 4-10. I C Signal Pins ....................................................................................................................... 41
Table 4-11. Clock and PLL Signal Pins ..................................................................................................... 42
Table 4-12. JTAG and Test Support Signal Pins ...................................................................................... 42
Table 4-13. Power Supply Pins ................................................................................................................. 43
Table 4-14. Other Signal Pins ................................................................................................................... 43
Table 4-15. CPC945 128-Bit DIMM Slot Configuration ............................................................................. 44
Table 4-16. CPC945 Bridge and Memory Controller Pin List by Signal Name ......................................... 45
Table 4-17. CPC945 Bridge and Memory Controller Pin List by Grid Position ......................................... 57
A15-6009-03
December 18, 2007 - IBM Confidential
List of Tables
Page 7 of 69
IBM [ IBM ]
