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IBM13N16734JCA-75AT 参数 Datasheet PDF下载

IBM13N16734JCA-75AT图片预览
型号: IBM13N16734JCA-75AT
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM Module, 8MX72, 5.4ns, CMOS, DIMM-168]
分类和应用: 动态存储器内存集成电路
文件页数/大小: 18 页 / 314 K
品牌: IBM [ IBM ]
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IBM13N16644JCA  
IBM13N16734JCA  
16M x 64/72 One-Bank Unbuffered SDRAM Module  
Mode Register Set Cycle  
75A  
Symbol  
Parameter  
Units  
CLK  
Notes  
1
Min.  
2
Max.  
t
Mode Register Set Cycle Time  
RSC  
1. These parameters account for the number of clock cycle and depend on the operating frequency of the clock, as follows:  
the number of clock cycles = specified value of timing / clock period (count fractions as a whole number).  
Read Cycle  
-75A  
Symbol  
Parameter  
Units  
Notes  
Min.  
2.7  
0
Max.  
t
Data Out Hold Time  
ns  
ns  
OH  
t
Data Out to Low Impedance Time  
Data Out to High Impedance Time  
DQM Data Out Disable Latency  
LZ  
t
1
1
3
5.4  
ns  
HZ3  
t
2
CLK  
DQZ  
1. Referenced to the time at which the output achieves the open circuit condition, not to output voltage levels.  
Refresh Cycle  
-75A  
Symbol  
Parameter  
Units  
Notes  
1
Min.  
Max.  
64  
t
Refresh Period  
Self Refresh Exit Time  
ms  
ns  
REF  
t
10  
SREX  
1. 4096 auto refresh cycles.  
Write Cycle  
-75A  
Symbol  
Parameter  
Units  
Min.  
1.5  
0.8  
15  
Max.  
t
t
Data In Set-up Time  
Data In Hold Time  
ns  
ns  
DS  
DH  
t
Data input to Precharge  
DQM Write Mask Latency  
ns  
DPL  
t
0
CLK  
DQW  
09K3606.F38386  
8/99  
©IBM Corporation. All rights reserved.  
Use is further subject to the provisions at the end of this document.  
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