IBM11S4325HP IBM11S2325HP
IBM11S4325HM IBM11S2325HM
2M/4M x 32 SO DIMM Module
Extended Data Out Mode Write Cycle
tRP
tRASP
VIH
RAS
VIL
tCRP
tHPC
tRCD
tCP
tCP
tRSH
tHCAS
tHCAS
tHCAS
VIH
VIL
CAS
tRAD
tCSH
tASC
tAR
tCAH
tASR tRAH
tASC
tCAH
tASC
tCAH
VIH
VIL
Address
Row
Column 1
Column 2
Column N
tCWL
tRWL
tWCH
tWCR
tWCH
tWRH
tWRP
tWCS
tWP
tWCS
tWP
tWCH
tWCS
VIH
VIL
tWP
WE
NOTE 1
tDHR
tDS
tDH
tDS
tDH
tDS
tDH
VIH
VIL
DIN
Data In 1
Data In 2
Data In N
NOTE 1: Implementing WE at RAS time During a Read or Write Cycle is optional.
: “H” or “L”
Doing so will facilitate compatibility with future EDO DRAMs.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
75H1718
SA14-4471-00
Revised 4/96
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