欢迎访问ic37.com |
会员登录 免费注册
发布采购

IBM11S2325HM-70T 参数 Datasheet PDF下载

IBM11S2325HM-70T图片预览
型号: IBM11S2325HM-70T
PDF下载: 下载PDF文件 查看货源
内容描述: [EDO DRAM Module, 2MX32, 70ns, CMOS]
分类和应用: 动态存储器内存集成电路
文件页数/大小: 22 页 / 213 K
品牌: IBM [ IBM ]
 浏览型号IBM11S2325HM-70T的Datasheet PDF文件第2页浏览型号IBM11S2325HM-70T的Datasheet PDF文件第3页浏览型号IBM11S2325HM-70T的Datasheet PDF文件第4页浏览型号IBM11S2325HM-70T的Datasheet PDF文件第5页浏览型号IBM11S2325HM-70T的Datasheet PDF文件第7页浏览型号IBM11S2325HM-70T的Datasheet PDF文件第8页浏览型号IBM11S2325HM-70T的Datasheet PDF文件第9页浏览型号IBM11S2325HM-70T的Datasheet PDF文件第10页  
IBM11S4325HP IBM11S2325HP
IBM11S4325HM IBM11S2325HM
2M/4M x 32 SO DIMM Module
DC Electrical Characteristics
Symbol
(T
A
= 0 to +70C, V
CC
= 3.3 0.3V or 5.0 0.25V)
2Mx32
Min
Max
360
320
8
360
320
200
160
.8
360
320
800
1200
+20
+10
+40
+10
0.4
Parameter
Operating Current
Average Power Supply Operating Current
(RAS, CAS, Address Cycling: t
RC
= t
RC
min)
Standby Current (TTL)
Power Supply Standby Current
(RAS = CAS
≥V
IH
)
RAS Only Refresh Current
Average Power Supply Current, RAS Only Mode
(RAS Cycling, CAS
≥V
IH
: t
RC
= t
RC
min)
Fast Page Mode Current
Average Power Supply Current, Fast Page Mode
(RAS = V
IL
, CAS, Address Cycling: t
PC
= t
PC
min)
Standby Current (CMOS)
Power Supply Standby Current
(RAS = CAS = V
CC
- 0.2V)
CAS Before RAS Refresh Current
Average Power Supply Current, CAS Before RAS Mode
(RAS, CAS, Cycling: t
RC
= t
RC
min)
Self Refresh Current
Average Power Supply Current during Self Refresh
(CBR Cycle with RAS
t
RASS
(min))
Input Leakage Current
Input Leakage Current, any input
(0.0
V
IN
(V
CC
< 6.0V))
All Other Pins Not Under Test = 0V
Output Leakage Current
(D
OUT
is disabled, 0.0
V
OUT
V
CC
)
Output High Level
Output "H" Level Voltage (I
OUT
= -5mA @ 2.4V)
Output Low Level
Output "L" Level Voltage (I
OUT
= +4.2mA @ 0.4V)
-60/-6R
-70
3.3V
5.0V
RAS
CAS
Add &
WE
-60/-6R
-70
-60/-6R
-70
-60/-6R
-70
4Mx32
Min
-20
-20
-80
-20
2.4
Max
360
Units
Notes
-20
-10
-40
-10
2.4
I
CC1
mA
320
16
360
mA
320
200
mA
160
1.6
360
mA
320
800
1200
+20
+20
+80
+20
0.4
µA
V
V
µA
µA
mA
mA
1, 2, 3
I
CC2
I
CC3
1, 3, 4
I
CC4
1, 2, 3
I
CC5
I
CC6
1, 3, 4
I
CC7
4
I
I(L)
I
O(L)
V
OH
V
OL
1.
2.
3.
4.
I
CC1
, I
CC3
, I
CC4
and I
CC6
depend on cycle rate.
I
CC1
, I
CC4
depend on output loading. Specified values are obtained with the output open.
Address can be changed once or less while RAS = V
IL
. In the case of I
CC4
, it can be changed once or less when CAS = V
IH
.
Refresh current is specified for one bank
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
75H1718
SA14-4471-00
Revised 4/96
Page 6 of 21