3.3V, Au, EDOMMDL24DSU-001022831. IBM11N8645C8M x 6412/10, 3.3V, Au, EDOMMDL24DSU-001022831.
IBM11N8645B8M x 6411/11, 3.3V, Au, EDOMMDL24DSU-001022831. IBM11N8735C8M x 7212/10, 3.3V, Au, EDOMMDL24DSU-001022831. IBM11N8735B8M x 7211/11,
IBM11N8735B IBM11N8645B
IBM11N8735C IBM11N8645C
8M x 64/72 DRAM MODULE
Features
• 168 Pin JEDEC Standard, Unbuffered 8 Byte
Dual In-line Memory Module
• 8Mx64, 8Mx72 Dual Bank Extended Data Out
Page Mode DIMM
S
• Performance:
-60
t
RAC
t
CAC
t
AA
t
RC
t
HPC
RAS Access Time
CAS Access Time
Access Time From Address
Cycle Time
EDO Mode Cycle Time
60ns
15ns
30ns
104ns
25ns
-70
70ns
20ns
35ns
124ns
30ns
• System Performance Benefits:
-Non buffered for increased performance
-Reduced noise (35 VSS/VCC pins)
-Byte write, byte read accesses
-Serial PDs
• Extended Data Out (EDO) Mode, Read-Modify-
Write Cycles
• Refresh Modes: RAS-Only, CBR and Hidden
Refresh
• 2048 refresh cycles distributed across 32ms
(11/11 addressing)
• 4096 refresh cycles distributed across 64ms
(12/10 addressing)
• 11/11 or 12/10 addressing (Row/Column)
• Card size: 5.25" x 1.5" x 0.354"
• DRAMS in SOJ Package
• All inputs and outputs are LVTTL (3.3V) compat-
ible
• Single 3.3V
±
0.3V Power Supply
• Au contacts
• Optimized for byte-write non-parity, or ECC
applications
Description
IBM11N8645B IBM11N8645C are industry standard
168-pin 8-byte Dual In-line Memory Modules
(DIMMs) which are organized as 8Mx64 and 8Mx72
high speed memory arrays designed with EDO
DRAMs for non-parity or ECC applications and are
configured as two 4Mx64 and two 4Mx72 banks.
The DIMMs use 16 (x64) or 18 (x72) 4Mx4 EDO
DRAMs in SOJ packages. The use of EDO DRAMs
allows for a reduction in Page Mode Cycle time from
40ns (Fast Page) to 25ns for 60ns DRAM modules.
The DIMMs use serial presence detects imple-
mented via a serial EEPROM using the two pin I
2
C
protocol. This communication protocol uses Clock
(SCL) and Data I/O (SDA) lines to synchronously
clock data between the master (system logic) and
the slave EEPROM device (DIMM). The EEPROM
device address pins (SA0-2) are brought out to the
DIMM tabs to allow 8 unique DIMM/EEPROM
addresses. The first 128 bytes are utilized by the
DIMM manufacturer and the second 128 bytes of
serial PD data are available to the customer.
All IBM 168-pin DIMMs provide a high performance,
flexible 8-byte interface in a 5.25” long space-saving
footprint. Related products include the buffered
DIMMs (x64, x72 parity and x72 ECC Optmized) for
applications which can benefit from the on-card buff-
ers.
Card Outline
(Front)
(Back)
1
85
10 11
94 95
40 41
124 125
84
168
75H1747
SA14-4624-01
Revised 5/96
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
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