IBM11M8735C
IBM11M8735CB
8M x 72 DRAM MODULE
Revision Log
Rev
Contents of Modification
1/96
Initial Release.
Increased timings: tOES, tORD
Improved timings: tCAH, tCDD, tOEZ, tOFF
3/96
5/96
The CBR timing diagram was changed to allow CAS to remain low for back-to-back CBR cycles.
Hidden Refresh Cycle (Read) timing diagram was changed to show data being turned off with RAS not CAS
Updated ordering information
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Use is further subject to the provisions at the end of this document.
50H8010
SA14-4635-02
Revised 5/96
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