Discontinued (9/98 - last order; 3/99 - last ship)
IBM11M4735C
IBM11M4735CB
4M x 72 DRAM Module
Revision Log
Rev
Contents of Modification
08/95
Initial Release.
Improved power dissipation.
Improved DC electrical characteristics: ICC1, ICC3, ICC4, ICC6.
Updated EDO timing notes.
Increased timings: tOES, tORD.
3/96
Improved timings: tCAH, tCDD, tOEZ, tOFF.
The CBR timing diagram was changed to allow CAS to remain low for back-to-back CBR cycles.
Hidden Refresh Cycle (Read) timing diagram was changed to show data being turned off with RAS not CAS.
5/96
8/96
11/96
4/98
8/98
Updated ordering information.
Corrected assembly drawing.
Added 50ns speed sort.
Added TSOP DRAM package.
Added 60ns speed sort.
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Use is further subject to the provisions at the end of this document.
50H4201.E20982E
Revised 8/98
Page 29 of 30
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