Discontinued (8/98 - last order; 12/98 last ship)
IBM11M16730CB16M x 72 E13/11, 3.3V, Au.
IBM11M16735B
IBM11M16735C
16M x 72 DRAM Module
Features
• 168-Pin JEDEC-Standard 8-Byte Dual In-Line
Memory Module
• 16Mx72 Extended Data Out (EDO) Mode
DIMM
S
• Performance:
t
RAC
t
CAC
t
AA
t
RC
t
HPC
RAS Access Time
CAS Access Time
Access Time From Address
Cycle Time
EDO Mode Cycle Time
-50
50ns
18ns
30ns
89ns
20ns
-60
60ns
20ns
35ns
104ns
25ns
• Optimized for ECC applications
• System Performance Benefits:
- Buffered inputs (except RAS, Data)
- Reduced noise (32 V
SS
/V
CC
pins)
- Buffered PDs
• EDO Mode, Read-Modify-Write Cycles
• Refresh Modes: RAS-Only, CBR and Hidden
Refresh
• CAS before RAS Refresh / RAS only Refresh -
4096 cycles
• 12/12 or 13/11 addressing (Row/Column)
• Card size: 5.25" x 1.25" x 0.354" SOJ
5.25" x 1.25" x 0.157" TSOP
• DRAM
S
in SOJ or TSOP Package
• Inputs and outputs are LVTTL compatible
• Single 3.3V,
±
0.3V Power Supply
• Gold contacts
Description
IBM11M16735B/C are industry-standard 168-pin
8-byte Dual In-Line Memory Modules (DIMMs) for
ECC applications which are organized as 16Mx72
high-speed memory arrays. The DIMMs use 18
16Mx4 EDO DRAMs in SOJ or TSOP packages.
The use of EDO DRAMs allows for a reduction in
Page Mode Cycle time from 40ns (Fast Page) to
20ns for 50ns DRAM modules.
Improved system performance is provided by the
on-DIMM buffering of selected input signals. The
specified timings include all buffer, net, and skew
delays, which simplifies the memory subsystem
design analysis. The data and
RAS
signals are not
buffered, which preserves the DRAM access specifi-
cations of 50ns and 60ns.
Presence Detect (PD) and Identification Detect (ID)
bits provide information about the DIMM density,
addressing, performance and features. PD bits can
be dotted at the system level and activated for each
DIMM position using the PD enable (PDE) signal. ID
bits also allow detection of card features, and may
be dot-or’d at the system level to provide information
for the entire DIMM bank. For example, the system
will determine that ECC DIMMs are installed if PD8
is low (0). ID0 need not be sensed since both x72
and x80 ECC DIMMs will function in a x72 bank.
All IBM 168-pin DIMMs provide a high-performance,
flexible 8-byte interface in a 5.25” long space-saving
footprint. Related products are the x64 non-parity
(5V and 3.3V) DIMMs and ECC DIMMs (5V and
3.3V).
Card Outline
(Back)
(Front)
1
85
10
94
11
95
40 41
124 125
84
168
50H8040.E22441D
Revised 4/98
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
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