IBM0612404GT3B
IBM0612804GT3B
128Mb Double Data Rate Synchronous DRAM
Advance Rev 0.2
Burst Terminate
The Burst Terminate command is used to truncate read bursts (with Auto Precharge disabled). The most re-
cently registered Read command prior to the Burst Terminate command is truncated, as shown in the Opera-
tion section of this data sheet. Write burst cycles are not to be terminated with the Burst Terminate command.
Auto Refresh
Auto Refresh is used during normal operation of the DDR SDRAM and is analogous to CAS Before RAS
(CBR) Refresh in previous DRAM types. This command is nonpersistent, so it must be issued each time a
refresh is required.
The refresh addressing is generated by the internal refresh controller. This makes the address bits “Don’t
Care” during an Auto Refresh command. The 128Mb DDR SDRAM requires Auto Refresh cycles at an aver-
age periodic interval of 15.6µs (maximum).
Self Refresh
The Self Refresh command can be used to retain data in the DDR SDRAM, even if the rest of the system is
powered down. When in the self refresh mode, the DDR SDRAM retains data without external clocking. The
Self Refresh command is initiated as an Auto Refresh command coincident with CKE transitioning low. The
DLL is automatically disabled upon entering Self Refresh, and is automatically enabled upon exiting Self
Refresh (200 clock cycles must then occur before a Read command can be issued). Input signals except
CKE (low) are “Don’t Care” during Self Refresh operation.
The procedure for exiting self refresh requires a sequence of commands. CK (and CK) must be stable prior to
CKE returning high. Once CKE is high, the SDRAM must have NOP commands issued for t
because
XSNR
time is required for the completion of any internal refresh in progress. A simple algorithm for meeting both
refresh and DLL requirements is to apply NOPs for 200 clock cycles before applying any other command.
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Use is further subject to the provisions at the end of this document.
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