IBM0418A81QLAB IBM0436A81QLAB
IBM0418A41QLAB IBM0436A41QLAB
8Mb (256Kx36 & 512x18) and 4Mb (128Kx36 & 256Kx18) SRAM
Revision Log
Revision
9/98
Contents of Modification
Initial release.
11/98
Input Levels adjusted. Changed part number from Rev A to B.
See Programmable Impedance Output Driver DC Electrical Characteristics on page 10
RQ
VDDQ
------------------
2
⁄
-------- + 5
5
I
I
=
=
± 15% @ V = V
/ 2 For: 175Ω ≤ RQ ≤ 350Ω.
/ 2 For: 175Ω ≤ RQ ≤ 350Ω
DDQ
OH
OL
OH
DDQ
2/16/99
VDDQ
------------------
2
RQ
⁄
--------
± 15% @ V = V
OL
5
Add -3P and -3F speed sorts.
Correct BGA drawing. BGA solder ball is 0.035" ± 0.006”.
I
I
spec changed from 120mA to 150mA. (See DC Electrical Characteristics on page 9).
spec changed from 65mA to 100mA. (See DC Electrical Characteristics on page 9).
6/99
SBSS
SBZZ
Add -2P speed sort. Spec requires validation and it is preliminary.
See 7 x17 BGA Dimensions on page 23
11/99
-Enhance BGA drawing showing top, side and bottom views.
Remove -2P speed sort. This speed sort is covered in a separate datasheet. Contact applications for help.
Synchronous Sleep Mode Timing Diagram on page 15
-Timing updated for Synchronous operation.
AC Characteristics on page 12
2/4/00
- Sleep Mode Setup time spec added: t
=1.0ns
ZVKH
- Sleep Mode Hold time spec added: t
=1.0ns
KHZX
12/05/00
12/12/00
Made various minor editorial changes and format refinements.
Corrected cycle time stated in Description from 3.5ns to 3.0ns.
crrh3316.08
12/00
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Use is further subject to the provisions at the end of this document.
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