IBM043611QLAB
IBM041811QLAB
Preliminary
32K X 36 & 64K X 18 SRAM
Boundary Scan Order (X18)
(PH =Place Holder)
Exit Order
Signal
Bump #
Exit Order
Signal
Bump #
1
2
M2
SA10
SA0
SA11
SA12
ZZ
5R
6T
4P
6R
5T
7T
7P
6N
6L
7K
5L
4L
4K
4F
6H
7G
6F
7E
6D
6A
6C
5C
5A
6B
5B
3B
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
PH*
SA7
2B
3A
3C
2C
2A
1D
2E
2G
1H
3G
4D
4E
4G
4H
4M
2K
1L
3
SA6
4
SA9
5
SA8
6
DQ9
DQ10
DQ11
DQ12
SBWb
ZQ
7
DQ0
DQ1
DQ2
DQ3
SBWa
K
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
SS
K
PH*
G
PH**
SW
DQ4
DQ5
DQ6
DQ7
DQ8
SA3
SA2
SA5
SA4
PH*
PH*
PH*
DQ13
DQ14
DQ15
DQ16
DQ17
SA14
SA15
SA1
2M
1N
2P
3T
2R
4N
2T
3R
SA13
M1
1. * Input of PH register connected to VSS.
2. ** Input of PH register connected to VDD.
©IBM Corporation, 1996. All rights reserved.
Use is further subject to the provisions at the end of this document.
03H9040
SA14-4659-04
Revised 7/96
Page 17 of 21
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