IBM0316809C IBM0316409C
IBM0316169C
16Mbit Synchronous DRAM
Revision Log
Revision
Contents Of Modification
9/29/95
Initial Release
2nd Release
01/31/96
page 4 Correction to pin description of VSSQ.
page 10
page 37
page 38
page 45
Change number of required Auto Refresh Cycles from eight Auto Refresh Cycles to ... a minimum of 2
Auto Refresh Cycles.
Corrections to Burst Length Table: Change Entry 000 from Reserve to 1. Change Entry 001 from
Reserve to 2.
page 11
page 11 Correction to Operation Mode Table: Change “BS/A10/A9/A8/A7” to “M11/M10/M9/M8/M7”.
Further clarification regarding Auto-Precharge cycles when the device is programmed for burst length of
full page.
page 21
page 23 Correction to description of Automatic Refresh Command (change increments to decrements).
Correction to description of Power Down mode (change statement to say... “all receiver circuits except
CLK and CKE are gated off.”).
page 24
page 25 Correct error in diagram: Clock Suspend During a Read Cycle.
page 25 Correct error in diagram: Clock Suspend During a Write Cycle.
page 26 Delete Note 2 in the Command Truth Table.
page 27 Change Note 2 in the Clock Enable Truth Table from ...asynchronously to ...synchronously.
page 32 Correction to Recommended DC Operating Conditions Table: Change Vil(min) from -0.5V to -0.3V.
Correction to Capacitance Table: Change C from (DQ0-DQ3 to DQ0-DQ15).
page 32
O
page 33 Correction to Standby and Refresh Currents Table: Auto Refresh Current.
page 34 Correction to Operating Currents Table: Burst Length = 1.
page 34 Correction to Operating Currents Table: Burst Length = 2.
page 34 Correction to Operating Currents Table: Burst Length = 4.
page 35 Correction to Operating Currents Table: Burst Length = 8.
page 35 Correction to Operating Currents Table: Burst Length = Full Page.
page 36 Correction to Operating Currents Table: Burst Length = 1-N Rule.
page 38 Modification to Read Cycle Table: Separate tHZ into 3 parameters (tHZ1, tHZ2,tHZ3).
page 37 Correction to AC Characteristic timing diagram.
page 37 Addition to Clock and Clock Enable Parameter Table: CKE setup time for power down mode (tCKSP).
page 38 Change definition of Self Refresh Exit time. Add Note 3 to Refresh Cycle Table.
page 38
Correction to Minimum Bank Cycle Time (tRC).
page 39
page 38
Correction to Minimum Bank Activate Time (tRAS).
page 39
Correction to Timing Diagram Cross Reference Table. The page numbers for the individual timing dia-
grams were improperly referenced.
page 40
page 54 Correction to Timing Diagram: Self Refresh (Entry and Exit).
page 89 Correction to Timing Diagram: Burst Read and Single Write Operation (Burst ends normally after Ay3).
©IBM Corporation, 1996. All rights reserved.
Use is further subject to the provisions at the end of this document.
07H3997
SA14-4711-02
Revised 05/96
Page 98 of 100
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