Burst Length = 4, CAS Latency = 3
Interleaved Column Write Cycle (3 of 3)
T0
T7
T1
T2
T3
T4
T5
T6
T8
T9
T10
T12
T17
T21
T11
T13
T14
T15
T16
T18
T19
T20
T22
CLK
tCK3
CKE
CS
RAS
CAS
WE
A11(BS)
RAx
RBw
RBw
A10
RAx
CAx
CBw
CBx
CBy
CAy
CBz
A0 - A9
DQM
DQ
tDPL
tRP
tDPL
tRCD
tRRD
Hi-Z
DAx0 DAx1 DAx2 DAx3 DBw0 DBw1 DBx0 DBx1 DBy0 DBy1 DAy0 DAy1 DBz0 DBz1 DBz2 DBz3
Write
Command
Bank B
Activate
Command
Bank A
Write
Command
Bank A
Precharge
Command
Bank B
Activate
Command
Bank B
Write
Command
Bank B
Write
Command
Bank B
Write
Command
Bank B
Precharge
Command
Bank A
Write
Command
Bank A