IBM014405
IBM014405M
IBM014405B IBM014405P
1M x 4 10/10 EDO DRAM
EDO (Hyper Page) Mode Read and Write Cycle
tRP
tRASP
VIH
RAS
VIL
tCRP
tHPC
tRSH
tCP
tRCD
tHCAS
tCP
tHCAS
tHCAS
VIH
VIL
CAS
tRAD
tASR tRAH
tCSH
tASC
Column 1
tRAL
tCAH
tASC
tASC
tCAH
tCAH
VIH
VIL
Address
Row
Column 2
Column N
tWRP
tWRH
tRCS
tRCH
tWCS
VIH
VIL
tWCH
WE
OE
tWP
NOTE 1
tCPA
tAA
tOEA
VIH
VIL
tCAC
tOEZ
tRAC
tAA
tCAC
tDOH
Data Out
tWHZ
Data Out
tCLZ
VOH
VOL
DOUT
Hi-Z
tDS
tDH
VIH
VIL
DIN
Hi-Z
Data In
NOTE 1: Implementing WE at RAS time During a Read or Write Cycle is optional.
: “H” or “L”
Doing so will facilitate compatibility with future EDO DRAMs.
©IBM Corporation, 1996. All rights reserved.
Use is further subject to the provisions at the end of this document.
27H6242
SA14-4232-03
Revised 6/96
Page 21 of 29
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