IBM0118165 IBM0118165M
IBM0118165B IBM0118165P
1M x 16 10/10 EDO DRAM
Revision Log
Revision
Contents Of Modification
11/15/95
Initial Release
1. The Low Power and Standard Power Specifications were combined. ES# 28H4722 and ES# 28H4723 were
combined into ES# 28H4723.
2. Added Die Rev E part numbers.
3. A -6R speed sort was added, with the following differences over the -60 speed sort:
-
-
-
-
tCAC was increased from 15ns to 17ns for the -6R speed sort
tRCD (max) was decreased from 45ns to 43ns for the -6R speed sort.
tCWD was increased from 34ns to 36ns for the -6R speed sort.
tOEA was increased from 15ns to 17ns for the -6R speed sort.
12/10/95
4. tCHD was added to the Self Refresh Cycle with a value of 350µs for all speed sorts.
5. The Self Refresh timing diagram was changed to allow CAS to go high tCHD (350µs) after RAS falls entering a
Self Refresh.
6. The CBR timing diagram was changed to allow CAS to remain low for back-to-back CBR cycles.
7. WE for the Hidden Refresh Write cycle in the Truth Table was changed from “L” to ” H”.
©IBM Corporation, 1995. All rights reserved.
Use is further subject to the provisions at the end of this document.
28H4721
SA14-4223-01
Revised 12/95
Page 30 of 32
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