Discontinued (9/98 - last order; 3/99 last ship)
IBM0117405 IBM0117405M
IBM0117405B IBM0117405P
4M x 4 11/11 EDO DRAM
Block Diagram
Vss
Vcc
(5.0 Volt version)
(to OCDs)
4
Regulator
4
I/O0
I/O1
I/O2
I/O3
V
DD
(internal)
Data In Buffer
Data Out Buffer
OE
WE
&
4
4
CAS
CAS Clock
Generator
11
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
11
11
Column Address
Buffer (11)
Column Decoder and I/O Gate
11
Sense Amplifiers
4
Refresh Controller
2048 x 4
Refresh Counter
(11)
Row Decoder
2048
Row Address
Buffer (11)
Memory Array
2048 x 2048 x 4
11
RAS
RAS Clock
Generator
28H4726
SA14-4228-05
Revised 4/97
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 3 of 31
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