GMS90 Series
Program Memory Lock Bits
Lock Bit Protection Modes
The two-level Program Lock system consists of 2
Lock bits and a 32-byte (64-byte for GMS97X54/
56/58) Encryption Array which are used to protect
the program memory against software piracy.
Mode LB1 LB2
Protection Type
1
2
U
P
U
U
No program lock features
Further programming of the
EPROM is disabled
Encryption Array:
3
P
P
Same as mode 2, also verify is
disabled
Within the EPROM array are 32 bytes (64 bytes
for GMS97X54/56/58) of Encryption Array that
are initially unprogrammed (all 1s). Every time
that a byte is addressed during a verify, address
U: unprogrammed, P: programmed
lines are used to select a byte of the Encryption array. This byte is then exclusive-NORed (XNOR) with the code
byte, creating an Encrypted Verify byte.
The algorithm, with the array in the unprogrammed state (all 1s), will return the code in its original, unmodified
form, It is recommended that whenever the Encryption Array is used, at least one of the Lock Bits be pro-
grammed as well.
Program / Verify algorithms
Any algorithm in agreement with the conditions listed in Table 11, and which satisfies the timing specifications
is suitable.
Table 11. EPROM programming modes
EA/
VPP
ALE/
PROG
MODE
RST
PSEN
P2.7
P2.6
P3.7
P3.6
Read Signature
1
1
1
1
1
1
0
0
0
0
0
0
1
0
1
0
0
0
1
0
1
0
1
1
1
0
0
0
0
1
1
0
1
1
1
1
0
0
1
1
0
1
0
VPP
1
Program Code Data
Verify Code Data
VPP
VPP
VPP
Program encryption table
Program security bit 1
Program security bit 2
Notes:
1. “0” = Valid low for that pin, "1" = valid high for that pin.
2. VPP = 12.75V ± 0.25V
3. VCC = 5V ± 10% during programming and verification.
4. ALE/PROG receives 25 (10 for GMS97X54/56/58) programming pulses while VPP is held at 12.75V.
Each programming pulse is low for 100us (± 10us) and high for a minimum of 10µs.
Dec. 1998 Ver 3.0
49
HYNIX [ HYNIX SEMICONDUCTOR ]
