GMS90 Series
V
−0.5V
CC
0.2V + 0.9
CC
Test Points
0.2V − 0.1
CC
0.45V
AC Inputs during testing are driven at VCC−0.5V for a logic ‘1’ and 0.45V for a logic ‘0’.
Timing measurements are made a VIHmin for a logic ‘1’ and VILmax for a logic ‘0’.
Figure 7. AC Testing: Input, Output Waveforms
V
+ 0.1
− 0.1
V
− 0.1
+ 0.1
LOAD
OH
Timing Reference Points
0.2V − 0.1
V
LOAD
CC
V
V
OL
LOAD
For timing purposes a port pin is no longer floating when a 100mV change from load voltage
occurs and begins to float when a 100mV change from the loaded VOH / VOL level occurs.
IOL / IOH ≥ 20mA.
Figure 8. Float Waveforms
t
CLCL
V
−0.5V
CC
0.7 V
CC
0.2 V −0.1
CC
0.45V
t
t
CLCX
CHCX
t
CLCH
t
CHCL
Figure 9. External Clock Cycle
44
Dec. 1998 Ver 3.0
HYNIX [ HYNIX SEMICONDUCTOR ]
