HYUNDAI MicroElectronics
GMS90 Series
PIN DEFINITIONS AND FUNCTIONS
Pin Number
Input/
Symbol
Function
PLCC-
44
PDIP-
40
MQFP-
44
Output
Port1
P1.0-P1.7
2-9
1-8
40-44,
1-3
I/O
Port 1 is an 8-bit bidirectional I/O port with internal
pull-ups. Port 1 pins that have 1s written to them are
pulled high by the internal pull-up resistors and can be
used as inputs. As inputs, port 1 pins that are
externally pulled low will source current because of
the pulls-ups (IIL, in the DC characteristics). Pins P1.0
and P1.1 also. Port1 also receives the low-order
address byte during program memory verification.
Port1 also serves alternate functions of Timer 2.
2
3
1
2
40
41
P1.0 / T2 :
Timer/counter 2 external count input
P1.1 / T2EX : Timer/counter 2 trigger input
In GMS9XC54/56/58:
2
1
40
P1.0 / T2, Clock Out : Timer/counter 2 external count
input, Clock Out
Port 3
P3.0-P3.7
11,
10-17
5, 7-13
I/O
13-19
Port 3 is an 8-bit bidirectional I/O port with internal
pull-ups. Port 3 pins that have 1s written to them are
pulled high by the internal pull-up resistors and can be
used as inputs. As inputs, port 3 pins that are
externally pulled low will source current because of
the pulls-ups (IIL, in the DC characteristics). Port 3 also
serves the special features of the 80C51 family, as
listed below.
11
13
10
11
5
7
P3.0 / RxD receiver data input (asynchronous) or
data input output(synchronous) of serial
interface 0
P3.1 / TxD transmitter data output (asynchronous)
or clock output (synchronous) of the
serial interface 0
14
15
16
17
18
12
13
14
15
16
8
9
10
11
12
P3.2 /INT0 interrupt 0 input/timer 0 gate control
P3.3 / INT1
P3.4 /T0
interrupt 1 input/timer 1 gate control
counter 0 input
P3.5 /T1
counter 1 input
P3.6 / WR
the write control signal latches the data
byte from port 0 into the external data
memory
19
20
17
18
13
14
P3.7 /RD
the read control signal enables the
external data memory to port 0
XTAL2
XTAL2
O
Output of the inverting oscillator amplifier.
8
Oct. 2000 Ver 3.1a
HYNIX [ HYNIX SEMICONDUCTOR ]
