GMS81C2020/GMS81C2120
Hyundai Micro Electronics
After input a high address,
output data following low address input
Anothe high address step
T
HLD1
T
SET1
T
HLD2
T
DLY2
T
DLY1
EPROM
Enable
T
VPPS
V
IHP
VPP
T
VDDS
T
VPPR
0V
CTL0/1
CTL2
V
T
DD2H
T
T
CD2
CD2
0V
V
DD2H
CD1
T
CD1
CTL3
0V
A_D7~
A_D0
HA
LA
LA
DATA
DATA
HA
DATA
LA
V
DD2H
VDD
DATA
Output
DATA
Output
Low 8bit
Address
Input
Low 8bit
Address
Input
Low 8bit
Address
Input
DATA
Output
High 8bit
Address
Input
High 8bit
Address
Input
Figure 24-5 Timing Diagram in READ Mode
Parameter
Symbol
IVPP
MIN
TYP
MAX
Unit
mA
mA
V
Programming Supply Current
Supply Current in EPROM Mode
VPP Level during Programming
VDD Level in Program Mode
-
-
50
IVDDP
VIHP
-
11.5
5
-
20
12.0
12.5
VDD1H
VDD2H
VIHC
6
6.5
V
VDD Level in Read Mode
-
2.7
-
V
CTL3~0 High Level in EPROM Mode
CTL3~0 Low Level in EPROM Mode
A_D7~A_D0 High Level in EPROM Mode
A_D7~A_D0 Low Level in EPROM Mode
VDD Saturation Time
0.8VDD
-
-
V
VILC
0.2VDD
-
-
V
VIHAD
VILAD
TVDDS
TVPPR
TVPPS
TSET1
THLD1
0.9VDD
-
-
V
0.1VDD
-
1
-
-
V
-
-
-
1
-
mS
mS
mS
nS
nS
VPP Setup Time
VPP Saturation Time
1
-
EPROM Enable Setup Time after Data Input
EPROM Enable Hold Time after TSET1
200
500
Table 24-3 AC/DC Requirements for Program/Read Mode
88
preliminary
Nov. 1999 Ver 0.0
HYNIX [ HYNIX SEMICONDUCTOR ]
