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GMS87C2020K 参数 Datasheet PDF下载

GMS87C2020K图片预览
型号: GMS87C2020K
PDF下载: 下载PDF文件 查看货源
内容描述: 现代微电子8位单芯片微控制器 [HYUNDAI MICRO ELECTRONICS 8-BIT SINGLE-CHIP MICROCONTROLLERS]
分类和应用: 微控制器和处理器光电二极管电子可编程只读存储器
文件页数/大小: 107 页 / 1524 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
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HYUNDAI MicroElectronics  
GMS81C2012/GMS81C2020  
.
Oscillator  
(X pin)  
IN  
Internal Clock  
External Interrupt  
STOP Instruction  
Executed  
BIT Counter  
n
n+1 n+2  
n+3  
1
0
FE  
0
1
2
FF  
Clear  
Normal Operation  
Stop Operation  
Normal Operation  
tST 20ms  
>
by software  
Before executing Stop instruction, Basic Interval Timer must be set  
properly by software to get stabilization time which is longer than 20ms.  
Figure 17-2 STOP Mode Release Timing by External Interrupt  
STOP Mode  
Oscillator  
(XI pin)  
Internal  
Clock  
RESETB  
Internal  
RESETB  
STOP Instruction Execution  
Stabilization Time  
Time can not be control by software  
t
ST = 64mS @4MHz  
Figure 17-3 Timing of STOP Mode Release by RESET  
17.3 Wake-up Timer Mode  
struction should be written  
In the Wake-up Timer mode, the on-chip oscillator is not  
stopped. Except the Prescaler(only 2048 divided ratio) and  
Timer0, all functions are stopped, but the on-chip RAM  
and Control registers are held. The port pins out the values  
held by their respective port data register, port direction  
registers.  
Ex)  
LDM TDR0,#0FFH  
LDM TM0,#0001_1011B  
LDM CKCTLR,#0100_1110B  
STOP  
NOP  
NOP  
The Wake-up Timer mode is activated by execution of  
STOP instruction after setting the bit WAKEUP of  
CKCTLR to “1”. (This register should be written by  
byte operation. If this register is set by bit manipulation  
instruction, for example "set1" or "clr1" instruction, it  
may be undesired operation)  
In addition, the clock source of timer0 should be selected  
to 2048 divided ratio. Otherwise, the wake-up function can  
not work. And the timer0 can be operated as 16-bit timer  
with timer1. (refer to timer function)The period of wake-  
up function is varied by setting the timer data register 0,  
TDR0.  
Note: After STOP instruction, at least two or more NOP in-  
MAR. 2000 Ver 1.00  
81  
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