GMS81C1404/GMS81C1408
PIN NAME
V
DD
V
SS
RESET
X
IN
X
OUT
RA0 (EC0)
RA1 (AN1)
RA2 (AN2)
RA3 (AN3)
RA4 (AN4)
RA5 (AN5)
RA6 (AN6)
RA7 (AN7)
RB0 (AVref/AN0)
RB1 (BUZ)
RB2 (INT0)
RB3 (INT1)
RB4 (PWM0/COMP0)
RB5 (PWM1/COMP1)
RB6 (EC1)
RB7 (TMR2OV)
RC3 (SRDYIN/SRDYOUT)
RC4 (SCK)
RC5 (SIN)
RC6 (SOUT)
RD0 (INT2)
RD1 (INT3)
RD2
Pin No.
5
22
21
19
20
25
26
27
28
1
2
3
4
6
7
8
9
10
11
12
13
14
15
16
17
23
24
18
In/Out
-
-
I
I
O
I/O (Input)
I/O (Input)
I/O (Input)
I/O (Input)
Function
Supply voltage
Circuit ground
Reset signal input
External Event Counter input 0
Analog Input Port 1
Analog Input Port 2
Analog Input Port 3
8-bit general I/O ports
Analog Input Port 4
Analog Input Port 5
Analog Input Port 6
Analog Input Port 7
Analog Input Port 0 / Analog Reference
Buzzer Driving Output
External Interrupt Input 0
External Interrupt Input 1
8-bit general I/O ports
PWM0 Output or Timer1 Compare Output
PWM1 Output or Timer3 Compare Output
External Event Counter input 1
Timer2 Overflow Output
SPI READY Input/Output
SPI CLK Input/Output
4-bit general I/O ports
SPI DATA Input
SPI DATA Output
External Interrupt Input 2
3-bit general I/O ports
External Interrupt Input 3
I/O (Input)
I/O (Input)
I/O (Input)
I/O (Input)
I/O (Input)
I/O (Input)
I/O (Input)
I/O (Output)
I/O (Output/Output)
I/O (Output/Output)
I/O (Output/Output)
I/O (Output/Output)
I/O (Input/Output)
I/O (Input/Output)
I/O (Input)
I/O (Output)
I/O (Input)
I/O (Input)
I/O
Table 5-5 Pin Description
June. 2001 Ver 1.2
7
HYNIX [ HYNIX SEMICONDUCTOR ]
