GMS82512/16/24
HYUNDAI MicroElectronics
INT0S
;
PMR5
BUZS
WDTS
;
CKCTLR
BITR
;
WDTR
;
EQU
0,0D0H
;external int.0 selection
EQU
EQU
EQU
0D1H
5,0D1H
4,0D1H
;port R5 mode register
;buzzer selection
;watch dog timer selection
EQU
EQU
0D3H
0D3H
;clock control register
;basic interval timer register
EQU
0E0H
;watch dog timer register
TM0
TM2
;
EQU
EQU
0E2H
0E3H
;timer0 mode register
;timer2 mode register
TDR0
TDR1
TDR2
TDR3
;
ADCM
ADR
;
BUR
;
IENL
AE
WDTE
BITE
;
IRQL
AR
EQU
EQU
EQU
EQU
0E4H
0E5H
0E6H
0E7H
;tomer0 data register
;tomer1 data register
;tomer2 data register
;tomer3 data register
EQU
EQU
0E8H
0E9H
;A/D Converter mode register
;A/D con. register
EQU
0ECH
;buzzer data register
EQU
EQU
EQU
EQU
0F4H
;int. enable register low
;A/D con. int. enable
;W.D.T. int. enable
7,0F4H
6,0F4H
5,0F4H
;B.I.T. int. enable
EQU
EQU
EQU
EQU
0F5H
;int. request flag register low
;A/D con. int. request flag
;W.D.T. int. request flag
;B.I.T. int. request flag
7,0F5H
6,0F5H
5,0F5H
WDTRF
BITRF
;
IENH
INT0E
INT1E
INT2E
INT3E
T0E
T1E
T2E
T3E
;
IRQH
INT0R
INT1R
INT2R
INT3R
T0R
T1R
T2R
T3R
;
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
0F6H
;int. enable register high
;external int.0 enable
;external int.1 enable
;external int.2 enable
;external int.3 enable
;timer0 int. enable
7,0F6H
6,0F6H
5,0F6H
4,0F6H
3,0F6H
2,0F6H
1,0F6H
0,0F6H
;timer1 int. enable
;timer2 int. enable
;timer3 int. enable
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
0F7H
;int. request flag register high
;external int.0 request flag
;external int.1 request flag
;external int.2 request flag
;external int.3 request flag
;timer0 int. request flag
;timer1 int. request flag
;timer2 int. request flag
;timer3 int. request flag
7,0F7H
6,0F7H
5,0F7H
4,0F7H
3,0F7H
2,0F7H
1,0F7H
0,0F7H
IEDS
PFDR
;
EQU
EQU
0F8H
0F9H
;external int. edge selection
;power fail detection register
;*********** MACRO
;
REG_SAVE
DEFINITION ************
MACRO
PUSH
PUSH
PUSH
ENDM
;Save Registers to Stacks
A
X
Y
;
REG_RESTORE
MACRO
POP
;Restore Register from Stacks
Y
X
A
POP
POP
ENDM
;
;*********** CONSTANT DEFINITION ***********
;
SEG_PORT
STROBE_PORT
;
EQU
EQU
R0
R2
;7-Segment Output Port
;Strobe Signal Port
;**************************************************************************
;
RAM
ALLOCATION
*
;**************************************************************************
iii
FEB. 2000 Ver 1.00
HYNIX [ HYNIX SEMICONDUCTOR ]
