GMS81C1102 / GMS81C1202
12. MEMORY ORGANIZATION
The GMS81C1202 has separated address spaces for Pro-
gram memory and Data Memory. Program memory can
only be read, not written to. It can be up to 2K bytes of Pro-
gram memory. Data memory can be read and written to up
to 128 bytes including the stack area.
12.1 Registers
This device has six registers that are the Program Counter
(PC), a Accumulator (A), two index registers (X, Y), the
Stack Pointer (SP), and the Program Status Word (PSW).
The Program Counter consists of 16-bit register.
• Stack Pointer
The Stack Pointer is an 8-bit register used for occurrence
interrupts and calling out subroutines. Stack Pointer iden-
tifies the location in the stack to be accessed (save or re-
store).
ACCUMULATOR
X REGISTER
A
X
Generally, SP is automatically updated when a subroutine
call is executed or an interrupt is accepted. However, if it
is used in excess of the stack area permitted by the data
memory allocating configuration, the user-processed data
may be lost.
Y
Y REGISTER
SP
STACK POINTER
The stack can be located at any position within 00H to7FH
of the internal data memory. The SP is not initialized by
hardware, requiring to write the initial value (the location
with which the use of the stack starts) by using the initial-
ization routine. Normally, the initial value of "7FH" is used
PCH
PCL
PROGRAM COUNTER
PROGRAM STATUS
WORD
PSW
Figure 12-1 Configuration of Registers
• Accumulator
.
Stack Address ( 000H ~ 07FH
)
15
8
7
0
The Accumulator is the 8-bit general purpose register, used
for data operation such as transfer, temporary saving, and
conditional judgement, etc.
0
SP
Hardware fixed
The Accumulator can be used as a 16-bit register with Y
Register as shown below
.
Note: The Stack Pointer must be initialized by software be-
cause its value is undefined after RESET.
Example: To initialize the SP
Y
LDX
#07FH
Y
A
TXSP
; SP ← 7FH
A
• Program Counter
Two 8-bit Registers can be used as a "YA" 16-bit Register
The Program Counter is a 16-bit wide which consists of
two 8-bit registers, PCH and PCL. This counter indicates
the address of the next instruction to be executed. In reset
state, the program counter has reset routine address
(PCH:0FFH, PCL:0FEH).
Figure 12-2 Configuration of YA 16-bit Register
• X, Y Registers
In the addressing mode which uses these index registers,
the register contents are added to the specified address,
which becomes the actual address. These modes are ex-
tremely effective for referencing subroutine tables and
memory tables. The index registers also have increment,
decrement, comparison and data transfer functions, and
they can be used as simple accumulators.
• Program Status Word
The Program Status Word (PSW) contains several bits that
reflect the current state of the CPU. The PSW is described
in Figure 12-3. It contains the Negative flag, the Overflow
flag, the Break flag the Half Carry (for BCD operation),
the Interrupt enable flag, the Zero flag, and the Carry flag.
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Jan. 2002 ver 2.0