Chapter7. Reset Function
7.3 Low Voltage Detection Mode
7.3.1 Low voltage detection condition
An on board voltage comparator checks that VDD is at the required level to ensure
correct operation of the device. If VDD is below a certain level, Low voltage detector
forces the device into low voltage detection mode.
7.3.2 Low Voltage Detection Mode
There is no power consumption except stop current, stop mode release function is
disabled. All I/O port is configured as input mode and Data memory is retained until
voltage through external capacitor is worn out. In this mode, all port can be selected with
Pull-up resistor by Mask option. If there is no information on the Mask option sheet ,the
default pull up option (all port connect to pull-up resistor ) is selected.
7.3.3 Release of Low Voltage Detection Mode
Reset signal result from new battery(normally 3V) wakes the low voltage detection mode
and come into normal reset state. It depends on user whether to execute RAM clear
routine or not.
Low Voltage ( V)
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0¡ É
10¡ É
20¡ É
30¡ É
40¡ É
50¡ É
60¡ É
70¡ É
T emperature( ¡ É)
Fig 7.5 Low Voltage vs Temperature
7 - 4
HYNIX [ HYNIX SEMICONDUCTOR ]
