Chapter 2. Function Description
2.4 ZERO-PAGE PERIPHERAL REGISTERS
RESET VALUE
ADDRESS
FUNCTION REGISTERS
R/W
SYMBOL
7
6
5
4
3
2
1
0
00C0H
00C1H
00C2H
00C3H
00C4H
00C5H
00C6H
PORT R0 DATA REG.
R/W
W
R0
R0DD
R1
Undefined
00
PORT R0 DATA DIRECTION REG.
PORT R1 DATA REG.
R/W
W
Undefined
00
PORT R1 DATA DIRECTION REG.
PORT R2 DATA REG.
R1DD
R2
R/W
W
Undefined
00
PORT R2 DATA DIRECTION REG.
Reserved
R2DD
CLOCK CONTROL REG.
W
R
CKCTLR
BITR
-
-
-
-
0
-
1
0
0
1
0
1
1
0
1
1
0
1
1
0
00C7H
BASIC INTERVAL REG.
Undefined
00C8H
00C9H
00CAH
00CBH
00CCH
00CDH
00CEH
00CFH
00D0H
00D1H
00D2H
00D3H
00D4H
WATCH DOG TIMER REG.
PORT R1 MODE REG.
W
WDTR
PMR1
IMOD
IEDS
0
1
W
00
00
INT. MODE REG.
R/W
W
0
0
EXT. INT. EDGE SELECTION
INT. ENABLE REG. HIGH
INT. REQUEST FLAG REG. LOW
INT. ENABLE REG. HIGH
INT. REQUEST FLAG REG. HIGH
TIMER 0 (16bit) MODE REG.
TIMER 1 (8bit) MODE REG.
TIMER 2 (8bit) MODE REG.
TIMER 0 HIGH-MSB DATA REG.
TIMER 0 HIGH-LSB DATA REG.
TIMER0 LOW-MSB DATA REG.
TIMER0 LOW-MSB COUNT REG.
TIMER0 LOW-LSB DATA REG.
TIMER0 LOW-LSB COUNT REG.
TIMER 1 HIGH DATA REG.
TIMER1 LOW DATA REG.
TIMER1 LOW COUNT REG.
TIMER2 DATA REG.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
IENL
-
-
0
0
0
0
0
0
0
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
IRQL
IENH
0
0
0
0
0
0
0
0
IRQH
TM0
00
00
00
TM1
TM2
T0HMD
T0HLD
T0LMD
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
00
W
W
00D5H
R
W
T0LLD
00D6H
00D7H
00D8H
R
W
T1HD
T1LD
W
R
W
T2DR
TM01
00D9H
TIMER2 COUNT REG.
R
00DAH
00DBH
00DCH
00DDH
00DEH
TIMER 0/ TIMER1 MODE REG.
Reserved
R/W
STANDBY MODE RELEASE REG0
STANDBY MODE RELEASE REG1
PORT R1 OPEN DRAIN ASSIGN REG.
W
W
W
SMRR0
SMRR1
R1ODC
00
00
00
- ; Not used
* Caution : Write only register can not be accessed by bit manipulation instruction.
: Do not access the Reserved registers .
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HYNIX [ HYNIX SEMICONDUCTOR ]
