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GMS37140T-DT 参数 Datasheet PDF下载

GMS37140T-DT图片预览
型号: GMS37140T-DT
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 4-Bit, OTPROM, 4MHz, CMOS, PDSO24, 0.300 INCH, SOP-24]
分类和应用: 计算机
文件页数/大小: 109 页 / 782 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
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Chapter 4. FUNCTIONAL DESCRIPTION  
State Counter (SC)  
A fundamental machine cycle timing chart is shown below. Every instruction is  
one byte length. Its execution time is the same. Execution of one instruction  
takes 6 clocks for fetch cycle and 6 clocks for execute cycle (12 clocks in total).  
Virtually these two cycles proceed simultaneously, and thus it is apparently  
completed in 6 clocks (one machine cycle). Exceptionally BR, CAL and RTN  
instructions is normal execution time since they change an addressing sequentially.  
Therefore, the next instruction is prefetched so that its execution is completed  
within the fetch cycle.  
T2  
T1  
T3 T4 T5 T6 T1 T2 T3 T4 T5 T6  
Fetch cycle N  
Execute cycle N  
Fetch cycle N-1  
Execute cycle N-1  
Phase  
Phase  
Phase  
Machine  
Cycle  
Machine  
Cycle  
Fig. 4-3 Fundamental timing chart  
4-5  
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