Chapter 9. EPROM
Program / Verify Timing Diagrams In MHz Version.
1) EPROM Write & Verify Mode (1Byte)
#. Note :
1. Internal system is reset at VPP = 12.5V and K2=`Low`
2. OSC1 is made of a block of 8 x Tp clock.
3. From this time when the reset is released (K2=`High`) , OSC1 clock is counted by 1-bolck.
4. If not written during 10 times repeats (120us), repeat the 5 times until all is written.
5. For device verify. If you set Lock bit, output data is always `0F`h.
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