Chapter 3. Instruction
(36) LAK
Naming :
Load Accumulator from K
Status :
Set
¥°
Format :
¡ ç
K
Function :
<Comment>
A
Data on K are transferred to the accumulator
(37) LAR
Naming :
Status :
Load Accumulator from R
Set
¥°
Format :
¡ ç
R
Function :
<Comment>
A
Data on R are transferred to the accumulator
(38) SO
Naming :
Status :
Set Output Register Latch
Set
¥°
D(Y)
Format :
Function :
¡ ç
¡ Â ¡ Â
Y 7
1
0
¡ ç
REMOUT
1(PMR=5)
1 (High-Z)
Y = 8
Y = 9
¡ ç
D0~D9
¡ ç
1
¡ Â ¡ Â
Y Dh
Y = Eh
Y = Fh
R(Y)
¡ ç
1
Ah
R
¡ ç
D0~D9, R
1
<Purpose>
A single D output line is set to logic 1, if data of Y-register is
between 0 to 7.
Carrier frequency come out from REMOUT port, if data of
Y-register is 8.
All D output line is set to logic 1, if data of Y-register is 9.
It is no operation, if data of Y-register between 10 to 15.
When Y is between Ah and Dh, one of R output lines is set at
logic 1.
When Y is Eh, the output of R is set at logic 1.
When Y is Fh, the output D0~D9 and R are set at logic 1.
Data of Y-register is between 0 to 7, selects appropriate D
output.
<Comment>
Data of Y-register is 8, selects REMOUT port.
Data of Y-register is 9, selects all D port.
Data in Y-register, when between Ah and Dh, selects an
appropriate R output (R0~R3).
Data in Y-register, when it is Eh, selects all of R0~R3.
Data in Y-register, when it is Fh, selects all of D0~D9 and
R0~R3.
3 - 17
HYNIX [ HYNIX SEMICONDUCTOR ]
