Charge Pump Voltage Converters
Output Ripple
TJ7660
ESR also affects the ripple voltage seen at the output. The total ripple is determined by 2
voltages, A and B, as shown in Figure 14. Segment A is the voltage drop across the ESR of C
2
at
the instant it goes from being charged by C
1
(current flow into C
2
) to being discharged through the
load (current flowing out of C
2
). The magnitude of this current change is 2• I
OUT
, hence the total
drop is 2• I
OUT
• eSR
C2
V. Segment
B is the voltage change across C
2
during time t
2
, the half of the cycle when C
2
supplies current to
the load. The drop at B is l
OUT
• t2/C
2
V. The peak-to-peak ripple voltage is the sum of these
voltage drops:
VRIPPLE = [ 1/2 (f
PUMP
) (C2) + 2 (ESR
C2
)] I
OUT
Again, a low ESR capacitor will reset in a higher performance output.
Paralleling Devices
Any number of TJ7660 voltage converters may be paralleled to reduce output resistance. The
reservoir capacitor, C
2
, serves all devices while each device requires its own pump capacitor, C
1
.
The resultant output resistance would be approximately:
R
OUT
= R
OUT
(of TJ7660)/n (number of devices)
Cascading Devices
The TJ7660 may be cascaded as shown to produced larger negative multiplication of the initial
supply voltage. However, due to the finite efficiency of each device, the practical limit is 10
devices for light loads. The output voltage is defined by:
V
OUT
= -n (V
IN
),
where n is an integer representing the number of devices cascaded. The resulting output
resistance would be approximately the weighted sum of the individual TJ7660 R
OUT
values.
Changing the TJ7660 Frequency
It may be desirable in some applications, due to noise or other considerations, to increase the
oscillator frequency. This is achieved by overdriving the oscillator from an external clock, as
shown in Figure 17. In order to prevent possible device latchup, a 1kΩ resistor must be used in
series with the clock output. In a situation where the designer has generated the external clock
frequency using TTL logic, the addition of a 10kΩ pullup resistor to V+ supply is required. Note
that the pump frequency with external clocking, as with internal clocking, will be 1/2 of the clock
frequency. Output transitions occur on the positive-going edge of the clock.
TJ7660
Jan. 2007-Rev 1.0
8
HTC
HTC [ HTC KOREA TAEJIN TECHNOLOGY CO. ]
