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TJ3212 参数 Datasheet PDF下载

TJ3212图片预览
型号: TJ3212
PDF下载: 下载PDF文件 查看货源
内容描述: DDR VDDQ和VTT终端电压稳压器 [DDR VDDQ and VTT Termination Voltage Regulator]
分类和应用: 稳压器双倍数据速率
文件页数/大小: 11 页 / 564 K
品牌: HTC [ HTC KOREA TAEJIN TECHNOLOGY CO. ]
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DDR VDDQ and VTT Termination Voltage Regulator  
TJ3212  
Adjusting VDDQ Output Voltage  
The TJ3212 internal bandgap reference is set at 1.25V. The VDDQ voltage is adjustable by using a resistor divider,  
R1 and R2:  
R1+ R2  
V
= V  
×
ADJ  
DDQ  
R2  
where VADJ = 1.25V. The recommended divider value is R1 = R2 = 10k for DDR-1 application, and R1 = 4.42k,  
R2 = 10k for DDR-2 application (VDDQ = 1.8V, VTT = 0.9V).  
Shutdown  
ADJSD also serves as a shutdown pin. When this is pulled high (SHDN_H), both the VDDQ and the VTT outputs tri-  
state and could sink/source less than 10uA. During shutdown, the quiescent current is reduced to less than 0.5mA,  
independent of output load.  
It is recommended that a low leakage Schottky diode be placed between the ADJSD Pin and an external  
shutdown signal to prevent interference with the ADJ pin’s normal operation. When the diode anode is pulled low,  
or left open, the TJ3212 is again enabled.  
For Shutdown operation, observe the following:  
Under ADJSD shutdown condition, VDDQ should go to tri-state.  
VDDQ  
Under EN_VTT shutdown condition, VDDQ should keep state (2.5V).  
Under ADJSD or EN_VTT shutdown condition, VTT should go to tri-state and should sink  
VTT  
or source less than 10uA.  
Under ADJSD shutdown condition, VREF should go to zero.  
VREF  
Under EN_VTT shutdown condition, VREF should keep state (1.2V or VDDQ/2).  
Current Limit and Over-temperature Protection  
The TJ3212 features internal current limiting with thermal protection. During normal operation, VDDQ limits the  
output current to approximately 2A and VTT limits the output current to approximately ± 2A. When VTT is current  
limiting into a hard short circuit, the output current folds back to a lower level (~1A) until the over-current condition  
ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the  
power dissipation ratings of the package. If the junction temperature of the device exceeds 170°C(typical), the  
thermal protection circuitry triggers and tri-states both VDDQ and VTT outputs. Once the junction temperature has  
cooled to below about 120°C the TJ3212 returns to normal operation.  
Typical Thermal Characteristics  
The overall junction to ambient thermal resistance (θJA) for device power dissipation (PD) primarily consists of two  
paths in the series. The first path is the junction to the case (θJC) which is defined by the package style and the  
second path is case to ambient (θCA) thermal resistance which is dependent on board layout. The final operating  
junction temperature for any condition can be estimated by the following thermal equation:  
TJ  
=
=
TA + PD x (θJC) + PD x (θCA)  
TA + PD x (θCA)  
Mar. 2011 - Preliminary  
- 11 -  
HTC